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FSQ100 Datasheet(PDF) 3 Page - Fairchild Semiconductor |
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FSQ100 Datasheet(HTML) 3 Page - Fairchild Semiconductor |
3 / 12 page © 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FSQ100 Rev. 1.0.2 3 Pin Assignments Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name Description 1 GND Ground . SenseFET source terminal on primary-side and internal control ground. 2 VCC Positive Supply Voltage Input . Although connected to an auxiliary transformer winding, current is supplied from pin 5 (VSTR) via an internal switch during startup (see Figure 2). When VCC reaches the UVLO upper threshold (9V), the internal startup switch opens and device power is supplied via the auxiliary transformer winding. 3 VFB Feedback . Inverting input to the PWM comparator with its normal input level lies between 0.5V and 2.5V. It has a 0.4mA current source connected internally, while a capacitor and opto- coupler are typically connected externally. A feedback voltage of 4.5V triggers overload protection (OLP). There is a time delay while charging external capacitor Cfb from 3V to 4.5V using an internal 5µA current source. This time delay prevents false triggering under transient conditions, but still allows the protection mechanism to operate in true overload conditions. 4 NC No Connection . 5 VSTR Startup . This pin connects directly to the rectified AC line voltage source. At startup, the internal switch supplies internal bias and charges an external storage capacitor placed between the VCC pin and ground. Once the VCC reaches 9V, the internal switch stops charging the capacitor. 6,7,8 Drain SenseFET Drain . The drain pins are designed to connect directly to the primary lead of the transformer and are capable of switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance. 1 2 3 45 6 7 8 GND VCC VFB NC VSTR Drain Drain Drain |
Similar Part No. - FSQ100_11 |
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Similar Description - FSQ100_11 |
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