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EMK325BJ226MM Datasheet(PDF) 11 Page - Richtek Technology Corporation |
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EMK325BJ226MM Datasheet(HTML) 11 Page - Richtek Technology Corporation |
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11 / 15 page  RT8271 11 DS8271-02 March 2011 www.richtek.com Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD (ESR) also begins to charge or discharge COUT generating a feedback error signal for the regulator to return VOUTto its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. Thermal Considerations The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) / θJA Where TJ(MAX) is the maximum operation junction temperature, TA is the ambient temperature and the θJAis the junction to ambient thermal resistance. For recommended operating conditions specification of RT8271, the maximum junction temperature is 125 °C. The junction to ambient thermal resistance θJA for MSOP-10 (Exposed Pad) package is 86 °C/W and for SOP-8 is 120 °C/W on the standard JEDEC 51-7 four-layers thermal test board. The maximum power dissipation at TA = 25 °C can be calculated by following formula : PD(MAX) = (125 °C − 25°C) / (86°C/W) = 1.163W for MSOP-10 (Exposed Pad) PD(MAX) = (125 °C − 25°C) / (120°C/W) = 0.833W for SOP-8 The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. For RT8271 packages, the Figure 3 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. Layout Consideration Follow the PCB layout guidelines for optimal performance of the RT8271. Keep the traces of the main current paths as short and wide as possible. Put the input capacitor as close as possible to the device pins (VIN and GND). LX node is with high frequency voltage swing and should be kept at small area. Keep sensitive components away from the LX node to prevent stray capacitive noise pick- up. Place the feedback components to the FB pin as close as possible. The GND and Exposed Pad should be connected to a strong ground plane for heat sinking and noise protection. Figure 3. Derating Curves for RT8271 Packages 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 025 50 75 100 125 Ambient Temperature (°C) Four Layer PCB MSOP-10 (Exposed Pad) SOP-8 |
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