ISO1540

ISO1541

1

2

3

4

5

6

7

8

GND2

SCL1

VCC2

VCC1

SCL2

GND1

SDA1

SDA2

Side 1

Side 2

1

2

3

4

5

6

7

8

GND2

SCL1

VCC2

VCC1

SCL2

GND1

SDA1

SDA2

Side 1

Side 2

ISO1540

ISO1541

www.ti.com

SLLSEB6A – JULY 2012 – REVISED OCTOBER 2012

Check for Samples: ISO1540, ISO1541

1

FEATURES

SAFETY AND REGULATORY

APPROVALS

2

•

Communications

•

(VDE 0884 Part 2) (Pending)

•

Supports up to 1 MHz Operation

•

•

3-V to 5.5-V Supply Range

(Approved)

•

Open Drain Outputs with 3.5-mA Side 1 and

•

CSA Component Acceptance Notice 5A

35-mA Side 2 Sink Current Capability

(Approved)

•

-40°C to 125°C Operating Temperature

•

IEC 60950-1 and IEC 61010-1 End Equipment

•

±50 kV/µs Transient Immunity (Typical)

Standards (Approved)

•

HBM ESD Protection of 4 kV on All Pins;

8 kV on Bus Pins

APPLICATIONS

•

•

SMBus and PMBus Interfaces

•

Open-drain Networks

•

Motor Control Systems

•

Battery Management

•

DESCRIPTION

The ISO1540 and ISO1541 are low-power, bidirectional isolators that are compatible with I2C interfaces. These

devices have their logic input and output buffers separated by TI’s Capacitive Isolation technology using a silicon

dioxide (SiO2) barrier. When used in conjunction with isolated power supplies, these devices block high voltages,

isolate grounds, and prevent noise currents from entering the local ground and interfering with or damaging

sensitive circuitry.

This isolation technology provides for function, performance, size, and power consumption advantages when

implemented within a small form factor.

The ISO1540 has two isolated bidirectional channels for clock and data lines while the ISO1541 has a

bidirectional data and a unidirectional clock channel. The ISO1541 is useful in applications that have a single

Master while the ISO1540 is ideally fit for multi-master applications.

Isolated bidirectional communications is accomplished within these devices by offsetting the Side 1 Low-Level

Output Voltage to a value greater than the Side 1 High-Level Input Voltage thus preventing an internal logic latch

that otherwise would occur with standard digital isolators.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

PRODUCTION DATA information is current as of publication date.

Copyright © 2012, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.