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PPXD2005VMM80R Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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PPXD2005VMM80R Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 119 page PXS20 Microcontroller Data Sheet, Rev. 1 Preliminary—Subject to Change Without Notice Freescale Semiconductor 2 Table of Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.1 Document overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.3 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 1.5 Feature details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 1.5.1 High-Performance e200z4d Core . . . . . . . . . . . .7 1.5.2 Crossbar Switch (XBAR) . . . . . . . . . . . . . . . . . . .8 1.5.3 Memory Protection Unit (MPU) . . . . . . . . . . . . . .8 1.5.4 Enhanced Direct Memory Access (eDMA) . . . . .9 1.5.5 On-Chip Flash Memory with ECC . . . . . . . . . . . .9 1.5.6 On-Chip SRAM with ECC . . . . . . . . . . . . . . . . . .9 1.5.7 Platform Flash Memory Controller. . . . . . . . . . .10 1.5.8 Platform Static RAM Controller (SRAMC) . . . . .10 1.5.9 Memory Subsystem Access Time . . . . . . . . . . .11 1.5.10 Error Correction Status Module (ECSM) . . . . . .11 1.5.11 Peripheral Bridge (PBRIDGE) . . . . . . . . . . . . . .11 1.5.12 Interrupt Controller (INTC) . . . . . . . . . . . . . . . . .11 1.5.13 System Clocks and Clock Generation . . . . . . . .12 1.5.14 Frequency-Modulated Phase-Locked Loop (FMPLL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 1.5.15 Main Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . .13 1.5.16 Internal Reference Clock (RC) Oscillator. . . . . .13 1.5.17 Clock, Reset, Power Mode, and Test Control Modules (MC_CGM, MC_RGM, MC_PCU, and MC_ME) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 1.5.18 Periodic Interrupt Timer Module (PIT) . . . . . . . .13 1.5.19 System Timer Module (STM). . . . . . . . . . . . . . .14 1.5.20 Software Watchdog Timer (SWT) . . . . . . . . . . .14 1.5.21 Fault Collection and Control Unit (FCCU) . . . . .14 1.5.22 System Integration Unit Lite (SIUL) . . . . . . . . . .14 1.5.23 Non-Maskable Interrupt (NMI) . . . . . . . . . . . . . .15 1.5.24 Boot Assist Module (BAM). . . . . . . . . . . . . . . . .15 1.5.25 System Status and Configuration Module (SSCM) 15 1.5.26 Controller Area Network Module (CAN) . . . . . .15 1.5.27 FlexRay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 1.5.28 Serial Communication Interface Module (UART)16 1.5.29 Serial Peripheral Interface (SPI) . . . . . . . . . . . .17 1.5.30 Pulse Width Modulator (PWM) . . . . . . . . . . . . .17 1.5.31 eTimer Module. . . . . . . . . . . . . . . . . . . . . . . . . .18 1.5.32 Sine Wave Generator (SWG) . . . . . . . . . . . . . .19 1.5.33 Analog-to-Digital Converter Module (ADC) . . . .19 1.5.34 Junction Temperature Sensor . . . . . . . . . . . . . .20 1.5.35 Cross Triggering Unit (CTU) . . . . . . . . . . . . . . .20 1.5.36 Cyclic Redundancy Checker (CRC) Unit . . . . . .20 1.5.37 Redundancy Control and Checker Unit (RCCU)21 1.5.38 Voltage Regulator / Power Management Unit (PMU)21 1.5.39 Built-In Self-Test (BIST) Capability . . . . . . . . . .21 1.5.40 IEEE 1149.1 JTAG Controller (JTAGC) . . . . . . 21 1.5.41 Nexus Port Controller (NPC) . . . . . . . . . . . . . . 22 2 Package pinouts and signal descriptions . . . . . . . . . . . . . . . 23 2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.2 Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 2.3 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 2.4 Pin muxing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 3.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . 73 3.3 Recommended operating conditions . . . . . . . . . . . . . . 74 3.4 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . 75 3.4.1 General notes for specifications at maximum junction temperature. . . . . . . . . . . . . . . . . . . . . 76 3.5 Electromagnetic Interference (EMI) characteristics (cut1) 77 3.6 Electrostatic discharge (ESD) characteristics . . . . . . . 78 3.7 Static latch-up (LU) . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 3.8 Voltage regulator electrical characteristics . . . . . . . . . 79 3.9 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . 82 3.10 Supply current characteristics (cut2) . . . . . . . . . . . . . . 83 3.11 Temperature sensor electrical characteristics . . . . . . . 84 3.12 Main oscillator electrical characteristics . . . . . . . . . . . 84 3.13 FMPLL electrical characteristics . . . . . . . . . . . . . . . . . 86 3.14 16 MHz RC oscillator electrical characteristics . . . . . . 88 3.15 ADC electrical characteristics . . . . . . . . . . . . . . . . . . . 88 3.15.1 Input Impedance and ADC Accuracy . . . . . . . . 88 3.16 Flash memory electrical characteristics . . . . . . . . . . . 93 3.17 SWG electrical characteristics. . . . . . . . . . . . . . . . . . . 94 3.18 AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 3.18.1 Pad AC specifications. . . . . . . . . . . . . . . . . . . . 94 3.19 Reset sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 3.19.1 Reset sequence duration . . . . . . . . . . . . . . . . . 96 3.19.2 Reset sequence description. . . . . . . . . . . . . . . 96 3.19.3 Reset sequence trigger mapping . . . . . . . . . . . 98 3.19.4 Reset sequence — start condition . . . . . . . . . 100 3.19.5 External watchdog window. . . . . . . . . . . . . . . 101 3.20 AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . 101 3.20.1 RESET pin characteristics . . . . . . . . . . . . . . . 102 3.20.2 WKUP/NMI timing . . . . . . . . . . . . . . . . . . . . . 103 3.20.3 IEEE 1149.1 JTAG interface timing . . . . . . . . 103 3.20.4 Nexus timing. . . . . . . . . . . . . . . . . . . . . . . . . . 105 3.20.5 External interrupt timing (IRQ pin) . . . . . . . . . 107 3.20.6 DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . 108 4 Package characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 4.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . 113 5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 6 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . 118 |
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