©1993 Fairchild Semiconductor Corporation

www.fairchildsemi.com

74LVX74 Rev. 1.4.0

February 2008

74LVX74

Low Voltage Dual D-Type Positive Edge-Triggered

Flip-Flop

Features

dynamic threshold performance

General Description

The LVX74 is a dual D-type flip-flop with Asynchronous

Clear and Set inputs and complementary (Q, Q) outputs.

Information at the input is transferred to the outputs on

the positive edge of the clock pulse. After the Clock

Pulse input threshold voltage has been passed, the Data

input is locked out and information present will not be

transferred to the outputs until the next rising edge of the

Clock Pulse input.

Asynchronous Inputs:

Q HIGH

Ordering Information

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Order

Number

Package

Number

Package Description

74LVX74M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LVX74SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVX74MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide