© 2008 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FUSB2805 • Rev. 1.0.1

3

DO NOT DISTRIBUTE

Pin Definitions

Symbol

Type

(1)

Description

Chip Select_N

I

Active LOW. HIGH – ULPI pin three-stated; LOW – ULPI operates normally. TTL

compatible; CMOS input with hysteresis.

AI/O

Resistor reference. Connect through 12k

Ω ±1% to GND.

DM

AI/O

USB D- pin. USB mode: data minus (D-) pin of the USB cable.

DP

AI/O

USB D+ pin. USB mode: data plus (D+) pin of the USB cable.

FAULT

I

SMPS or power management IC. The link must enable this function via the

ExternalVbusFault register bit and the polarity must be set via the

ExternalVbusActiveLow register bit.

ID

I

VCC

P

Input supply voltage or battery source.

PSW

O

Controls an external, active HIGH,

charger IC. An external 100K

Ω pull-down resistor is required. Open source, slew-rate-

AI/O

Should be connected to the VBUS pin of the USB cable. Leave open circuit if not used.

An internal 90K

Ω ±11% pull-down resistor is present on this pin.

P

3.3V regulator output requiring capacitors. Internally powers OTG, analog core, and

ATX.

CLKIN

I

Clock input; frequency depends on the CFG1 pin. This is a digital input buffer, not

analog for a crystal.

I.C.

I/O

Internally connected; float pin.

TEST

I/O

Internally connected; float pin.

CFG1

I

Configures the clock frequency; 0: input is 19.2MHz. 1: input is 26MHz.

P

1.2V regulator output requiring capacitors. Internally powers the digital core and

analog core.

P

Input I/O supply rail; 0.1µF capacitor connected to power input.

Reset_N

I

GND

P

Connect to ground.

DIR

O

ULPI direction output signal.

STP

I

ULPI stop input signal; CMOS input.

NXT

O

ULPI next output signal.

D7

I/O

ULPI data pin 7; three-state output.

D6

I/O

ULPI data pin 6; three-state output.

D5

I/O

ULPI data pin 5; three-state output.

D4

I/O

ULPI data pin 4; three-state output.

D3

I/O

ULPI data pin 3; three-state output.

D2

I/O

ULPI data pin 2; three-state output.

D1

I/O

ULPI data pin 1; three-state output.

D0

I/O

ULPI data pin 0; three-state output.

CLOCK

O

60MHz clock output when digital 19.2MHz (or 26MHz) clock is applied; Push-pull

output.

Notes:

1.

I=input; O=output; I/O=digital input/output; OD=open-drain output; AI/O=analog input/output; P=power or ground.

2.

Per USB2.0, below a supply of 2.97V, USB full-speed and low-speed transactions are not guaranteed; although

some devices may continue to function with the FUSB2805 at the lower supply rail.