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FTL7522L6X Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FTL7522L6X Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 8 page © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FTL7522 • Rev. 1.0.0 2 Pin Configuration Figure 2. Pad Assignments (Top-Through View) Pin Definitions Pin # Name Description Normal Operation 0-Second Factory-Test Mode 1 /RST1 Open-Drain Output, Active LOW Open-Drain Output, Active LOW 2 GND GND GND 3 /SR0 Reset Input, Active LOW Reset Input, Active LOW 4 VCC Power Supply Power Supply 5 DSR Delay Selection Input. Tie to GND (1) during normal operation. Delay Selection Input. Pull HIGH to enable the 0-second delay for factory test. 6 TEST Used for device testing; should be tied to GND during normal operation. Used for device testing; should be tied to GND during normal operation. Note: 1. The DSR pin must always be tied to either GND or VCC; it must not float. |
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