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NCP1250 Datasheet(PDF) 3 Page - ON Semiconductor |
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NCP1250 Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 23 page NCP1250 http://onsemi.com 3 Figure 2. Internal Circuit Architecture S R Q Q 65 100 kHz clock vdd Frequency modulation Drv Vcc and logic management vdd power on reset Rramp LEB vdd RFB / 4.2 IpFlag 4 ms SS Power on reset IpFlag GND CS FB 600−ns time constant OPP Frequency foldback Vskip Vlatch The soft−start is activated during: − the startup sequence − the auto−recovery burst mode + Vlimit VOPP Vlimit + VOPP Vfold S R Q Q Clamp 1−us blanking Up counter 4 hiccup RST OVP gone? 250 mV peak current freeze VFB < 1.05 V ? setpoint = 250 mV UVLO Rlim Iscr Vcc |
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Similar Description - NCP1250 |
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