L99PM62XP datasheet(8/98 Pages) STMICROELECTRONICS

Part #	L99PM62XP

Description	Power management IC with LIN and high speed CAN

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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8 / 98 page

List of figures

L99PM62XP

8/98

Doc ID 16363 Rev 3

List of figures

Figure 1.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 2.

Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 3.

Voltage source with external PNP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 4.

Voltage source with external PNP and current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5.

Voltage source with external NPN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 6.

Voltage source with external NPN and current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 7.

Voltage regulator behaviour and diagnosis during supply voltage ramp-up / ramp-down

conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 8.

Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 9.

Watchdog in normal operating mode (no errors) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 10.

Watchdog with error conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 11.

Watchdog in Flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 12.

Change watchdog timing within long open window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 13.

Change watchdog timing within window mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 14.

General procedure to change watchdog timing out of fail safe mode. . . . . . . . . . . . . . . . . 25

Figure 15.

Change watchdog timing out of fail safe mode (watchdog failure) . . . . . . . . . . . . . . . . . . . 25

Figure 16.

Example: exit fail safe mode from watchdog failure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 17.

LIN master node configuration using LIN_PU (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 18.

CAN wake up capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 19.

Over voltage and under voltage protection and diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 20.

Thermal shutdown protection and diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 21.

Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 22.

PowerSSO-36 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Figure 23.

PowerSSO-36 thermal resistance junction to ambient vs PCB copper area (V1 ON) . . . . 44

Figure 24.

PowerSSO-36 Thermal Impedance junction to ambient vs PCB copper area (single

pulse with V1 ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 25.

PowerSSO-36 thermal fitting model (V1 ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Figure 26.

Watchdog timing (long, early, late and safe window) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Figure 27.

Watchdog early, late and safe windows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Figure 28.

LIN transmit, receive timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Figure 29.

SPI – transfer timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Figure 30.

SPI - input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Figure 31.

SPI output timing (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Figure 32.

SPI output timing (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Figure 33.

SPI – CSN low to high transition and global status bit access . . . . . . . . . . . . . . . . . . . . . . 65

Figure 34.

Read configuration register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Figure 35.

Write configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Figure 36.

Format of data shifted out at SDO during write cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Figure 37.

Format of data shifted out at SDO during read cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Figure 38.

Format of data shifted out at SDO during read and clear status operation . . . . . . . . . . . . 74

Figure 39.

PowerSSO-36 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

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