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TMP87CH29UG Datasheet(PDF) 3 Page - Toshiba Semiconductor |
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TMP87CH29UG Datasheet(HTML) 3 Page - Toshiba Semiconductor |
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3 / 104 page  Caution in Setting the UART Noise Rejection Time When UART is used, settings of RXDNC are limited depending on the transfer clock specified by BRG. The com- bination "O" is available but please do not select the combination "–". The transfer clock generated by timer/counter interrupt is calculated by the following equation : Transfer clock [Hz] = Timer/counter source clock [Hz] ÷ TTREG set value BRG setting Transfer clock [Hz] RXDNC setting 00 (No noise rejection) 01 (Reject pulses shorter than 31/fc[s] as noise) 10 (Reject pulses shorter than 63/fc[s] as noise) 11 (Reject pulses shorter than 127/fc[s] as noise) 000 fc/13 O O O – 110 (When the transfer clock gen- erated by timer/counter inter- rupt is the same as the right side column) fc/8 O – – – fc/16 O O – – fc/32 OOO – The setting except the above OOOO |
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