Electronic Components Datasheet Search |
|
CXD2434ATQ Datasheet(PDF) 7 Page - Sony Corporation |
|
CXD2434ATQ Datasheet(HTML) 7 Page - Sony Corporation |
7 / 26 page —7— CXD2434ATQ 3) Phase conditions of HD, VD, TRIG, EFS and ESG 0.5VDD tSETUP tHOLD 0.5VDD 0.5VDD CL HD, VD, TRIG EFS, ESG VDD=5.0 V, Topr=25 °C, load capacitance of CL=30 pF Symbol tSETUP tHOLD Definition HD, VD, TRIG, EFS and ESG setup time, activated by CL HD, VD, TRIG, EFS and ESG hold time, activated by CL Min. 20 5 Typ. Max. Unit ns ns 4) Phase characteristics of XV1, XV2, XV3, XSG, PBLK, XCPDM, XCPOB, BUSY, WEN and ID 0.5VDD 0.5VDD tPDCL1 0.5VDD tPDCL2 0.5VDD tPDCL3 0.5VDD CL XV1, XV2, XV3 BUSY, WEN, ID XSG, PBLK, XCPDM, XCPOB VDD=5.0 V, Topr=25 °C, load capacitance of CL=30 pF, load capacitance of XV1, XV2, XV3, XSG, PBLK, XCPDM, XCPOB, BUSY, WEN and ID=10 pF Symbol tPDCL1 tPDCL2 tPDCL3 Definition XV1, XV2 and XV3 delay, activated by the falling edge of CL BUSY, WEN and ID delay, activated by the rising edge of CL XSG, PBLK, XCPDM and XCPOB delay, activated by the rising edge of CL Min. 30 40 40 Typ. Max. 65 60 55 Unit ns ns ns |
Similar Part No. - CXD2434ATQ |
|
Similar Description - CXD2434ATQ |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |