Integrated Silicon Solution, Inc. — www.issi.com

1

Rev. D

05/09/12

Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any

published information and before placing orders for products.

IS65C256AL

IS62C256AL

FEATURES

• Access time: 25 ns, 45 ns

• Low active power: 200 mW (typical)

• Low standby power

— 150 µW (typical) CMOS standby

— 15 mW (typical) operating

• Fully static operation: no clock or refresh

required

• TTL compatible inputs and outputs

• Single 5V power supply

• Lead-free available

• Industrial and Automotive temperatures avail-

able

DESCRIPTION

32,768 word by 8-bit CMOS static RAM. It is fabricated

nology.

When CE is HIGH (deselected), the device assumes a

standby mode at which the power dissipation can be

reduced down to 150 µW (typical) at CMOS input levels.

Easy memory expansion is provided by using an active

LOW Chip Select (CE) input and an active LOW Output

Enable (OE) input. The active LOW Write Enable (WE)

controls both writing and reading of the memory.

The IS62C256AL/IS65C256AL is pin compatible with

other 32Kx8 SRAMs in plastic SOP or TSOP (Type I)

package.

FUNCTIONAL BLOCK DIAGRAM

A0-A14

CE

OE

WE

32K X 8

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

VDD

I/O

DATA

CIRCUIT

I/O0-I/O7

32K x 8 LOW POWER CMOS STATIC RAM

MAY 2012