IS61DDPB42M18A/A1/A2

IS61DDPB41M36A/A1/A2

Integrated Silicon Solution, Inc.- www.issi.com

Rev. 00A

7/05/2012

7

ODT PIN

1) ODT Pin in option1

. ODT values of K, K#, DQs, and Wx# are controlled by ODT pin.

. ODT for DQs will be on and off depending on the status. Read command will turn ODT off as the following rule.

Off: First Read Command + Read Latency - 0.5 cycle

On: Last Read Command + Read Latency + BL/2 cycle + 0.5 cycle (See below timing chart)

Example1) BL=2, RL(Read Latency=2.5)

K

K#

Command

DQ(DDRIIP)

DQ ODT

RD

a

Qa Qa

RD

b

RD

c

RD

d

Qb Qb Qc Qc Qd Qd

WT

e

WT

f

WT

g

WT

h

RD

i

QQ

RD

j

De De

Df

Df

Dg Dg Dh Dh

Read

Latency=2.5

Read

Latency=2.5

Enable

Disable

Enable

Disable

RL

BL/2

0.5

RL-0.5

Example2) BL=4, RL(Read Latency=2.5)

K

K#

Command

DQ(DDRIIP)

DQ ODT

RD

a

Qa Qa

RD

c

Qa Qa Qc Qc Qc Qc

WT

e

WT

g

RD

i

QQ

De De De De Dg Dg Dg Dg

Read

Latency=2.5

Read

Latency=2.5

Enable

Disable

Enable

RL

BL/2

0.5

RL-0.5

Disable

Example3) BL=2, RL(Read Latency=2.0)

K

K#

Command

DQ(DDRIIP)

DQ ODT

RD

a

Qa Qa

RD

b

RD

c

RD

d

Qb Qb Qc Qc Qd Qd

WT

e

WT

f

WT

g

WT

h

RD

i

QQ

Q

RD

j

De De

Df

Df

Dg Dg Dh Dh

Read

Latency=2.0

Read

Latency=2.0

Enable

Disable

Enable

Disable

RL

BL/2

0.5

RL-0.5

2) ODT Pin in option2

. Same ODT pin rule of option1 applies except K and K#.