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CXD1916R Datasheet(PDF) 4 Page - Sony Corporation |
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CXD1916R Datasheet(HTML) 4 Page - Sony Corporation |
4 / 50 page – 4 – CXD1916R 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 VSYNC HSYNC CSYNC BF VSS5 PD0 PD1 PD2 PD3 VDD2 PD4 PD5 PD6 PD7 VSS6 PD8/TD0 PD9/TD1 PD10/TD2 PD11/TD3 VSS7 PD12/TD4 PD13/TD5 PD14/TD6 PD15/TD7 VDD3 NC IREF VREF CP-OUT I/O I/O O O — I I I I — I I I I — I/O I/O I/O I/O — I/O I/O I/O I/O — — O I O Vertical sync signal input/output. When SYNCM (Pin 72) = High, this pin is the vertical sync signal output. When SYNCM = Low, this pin is the vertical sync signal input, and the falling edge is detected during the 1st field to reset the internal circuits. Horizontal sync signal input/output. When SYNCM (Pin 72) = High, this pin is the horizontal sync signal output. When SYNCM = Low, this pin is the horizontal sync signal input, and the falling edge is detected during the 1st field to reset the internal circuits. Composite sync output when using RGB output. Burst flag output. The burst flag is synchronized with the composite video signal (CP-OUT) and indicates its color burst signal position. Digital ground. 8-bit pixel data inputs, or lower 8-bit pixel data inputs when 16-bit pixel data is input. [PD0 to PD7] When control register bit "PIF MODE" = "0", these are multiplexed Y, Cb, and Cr signal inputs. When control register bit "PIF MODE" = "1", these are Y signal inputs. Digital power supply. 8-bit pixel data inputs, or lower 8-bit pixel data inputs when 16-bit pixel data is input. [PD0 to PD7] When control register bit "PIF MODE" = "0", these are multiplexed Y, Cb, and Cr signal inputs. When control register bit "PIF MODE" = "1", these are Y signal inputs. Digital ground. Upper 8-bit pixel data inputs when 16-bit pixel data is input/test data bus. [PD8 to PD15] When control register bit "PIF MODE" = "0", these inputs are not used. When control register bit "PIF MODE" = "1", these are multiplexed Cb and Cr signal inputs. In test mode, these are used for the internal circuit test data bus. The test data bus is available only for the device vendor. Digital ground. Upper 8-bit pixel data inputs when 16-bit pixel data is input/test data bus. [PD8 to PD15] When control register bit "PIF MODE" = "0", these inputs are not used. When control register bit "PIF MODE" = "1", these are multiplexed Cb and Cr signal inputs. In test mode, these are used for the internal circuit test data bus. The test data bus is available only for the device vendor. Digital power supply. Not connected inside the IC. DAC reference current output. Connect resistance "16R" which is 16 times output resistance "R". DAC reference voltage input. Sets the DAC output full-scale width. 10-bit DAC output. This pin outputs the composite, B and U signals. Pin No. Symbol I/O Description |
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