– 11 –

CXD1910AQ

2. Serial Interface

be selected by XIICEN input pin as shown in Table 2-1 below.

XIICEN

SI/SDA

SCK/SCL

XCS/SA

SO

SI

SCK

XCS

SO

SDA

SCL

SA

High-Z

H

L

SONY SIO mode

Table 2-1

speed mode (400K bit/s).

2-1-1. Slave address

Two kinds of slave address (88H, 8CH) are selectable by the SA signal, as shown in Table 2-2 below.

A6

A5

A4

A3

A2

A1

A0

R/W

1

0

0

0

1

SA

0

X

Table 2-2

2-1-2. Write cycle

S

slave address

W

start address

A

A

write data

A

write data

A

P

from master to slave

from slave to master

"0"

D7

start address

D6

D5

D4

D3

D2

D1

D0

ADR [4 : 0]

After the slave address is supplied from the master, the data in the next transfer cycle is set up inside the start

address register of this IC as start address of the control register. In subsequent cycles, the data supplied from

the master is written in the addresses indicated by the control register address. The set control register

address is automatically incremented with the completed transfer of each byte of data.