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LC75818PT Datasheet(PDF) 8 Page - Sanyo Semicon Device |
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LC75818PT Datasheet(HTML) 8 Page - Sanyo Semicon Device |
8 / 43 page LC75818PT No.A0964-8/43 Pin Functions Pin Pin No. Function Active I/O Handling when unused S1 to S80 1 to 80 Segment driver outputs. - O OPEN COM1 to COM10 90 to 81 Common driver outputs. - O OPEN KS1 to KS6 91 to 96 Key scan outputs. Although normal key scan timing lines require diodes to be inserted in the timing lines to prevent shorts, since these outputs are unbalanced CMOS transistor outputs, these outputs will not be damaged by shorting when these outputs are used to form a key matrix. - O OPEN KI1 to KI5 97 to 101 Key scan inputs. These pins have built-in pull-down resistors. H I GND P1 to P4 102 to 105 General-purpose outputs. P4 can be used as a clock output port with the "set key scan output port/general-purpose output port state" instruction. - O OPEN OSC 115 Oscillator connections. An oscillator circuit is formed by connecting an external resistor and capacitor to this pin. This pin can also be used as the external clock input pin with the "set display technique" instruction. - I/O VDD CE 118 H I CL 119 I DI 120 - I GND DO 117 Serial data interface connections to the controller. Note that DO, being an open-drain output, requires a pull-up resistor. CE: Chip enable CL: Synchronization clock DI: Transfer data DO: Output data - O OPEN INH 116 Input that turns the display off, disables key scanning, and forces the general-purpose output ports low. • When INH is low (VSS): • Display off S1 to S80=”L” (VLCD4) COM1 to COM10=”L” (VLCD4) • General-purpose output ports P1 to P4=low (VSS) • Key scanning disabled: KS1 to KS6=low (VSS) • All the key data is reset to low. • When INH is high (VDD): • Display on • The state of the pins as key scan output pins or general-purpose output ports can be set with the "set key scan output port/general-purpose output port state" instruction. • Key scanning is enabled. However, serial data can be transferred when the INH pin is low. L I VDD TEST 114 This pin must be connected to ground. - I - VLCD0 108 LCD drive 4/4 bias voltage (high level) supply pin. The level on this pin can be changed by the display contrast adjustment circuit. However, (VLCD0 - VLCD4) must be greater than or equal to 4.5V. Also, external power must not be applied to this pin since the pin circuit includes the display contrast adjustment circuit. - O OPEN VLCD1 109 LCD drive 3/4 bias voltage (middle level) supply pin. This pin can be used to supply the 3/4 (VLCD0 - VLCD4) voltage level externally. - I OPEN VLCD2 110 LCD drive 2/4 bias voltage (middle level) supply pin. This pin can be used to supply the 2/4 (VLCD0 - VLCD4) voltage level externally. - I OPEN Continued on next page. |
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