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NLU1GT126BMX1TCG Datasheet(PDF) 1 Page - ON Semiconductor |
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NLU1GT126BMX1TCG Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 10 page © Semiconductor Components Industries, LLC, 2012 July, 2012 − Rev. 3 1 Publication Order Number: NLU1GT126/D NLU1GT126 Non-Inverting 3-State Buffer, TTL Level LSTTL−Compatible Inputs The NLU1GT126 MiniGate t is an advanced CMOS high−speed non−inverting buffer in ultra−small footprint. The NLU1GT126 requires the 3−state control input (OE) to be set Low to place the output in the high impedance state. The device input is compatible with TTL−type input thresholds and the output has a full 5.0 V CMOS level output swing. The NLU1GT126 input and output structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. Features • High Speed: tPD = 3.8 ns (Typ) @ VCC = 5.0 V • Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C • TTL−Compatible Input: VIL = 0.8 V; VIH = 2.0 V • CMOS−Compatible Output: VOH > 0.8 VCC; VOL < 0.1 VCC @ Load • Power Down Protection Provided on inputs • Balanced Propagation Delays • Ultra−Small Packages • These are Pb−Free Devices VCC OE IN A OUT Y GND 1 2 3 5 4 OE OUT Y Figure 1. Pinout (Top View) Figure 2. Logic Symbol 6 NC IN A PIN ASSIGNMENT 1 2 3 GND OE IN A 4 5NC OUT Y FUNCTION TABLE L H X AY L H Z 6VCC Input Output OE H H L MARKING DIAGRAMS 9 = Device Marking M = Date Code http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION 9M 1 UDFN6 1.2 x 1.0 CASE 517AA 1 1 1 ULLGA6 1.0 x 1.0 CASE 613AD ULLGA6 1.2 x 1.0 CASE 613AE ULLGA6 1.45 x 1.0 CASE 613AF 9M 9M 9M UDFN6 1.45 x 1.0 CASE 517AQ UDFN6 1.0 x 1.0 CASE 517BX 1 X M 1 X M |
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