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NL27WZ126USG Datasheet(PDF) 2 Page - ON Semiconductor

Part # NL27WZ126USG
Description  Dual Buffer with 3-State Outputs
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NL27WZ126USG Datasheet(HTML) 2 Page - ON Semiconductor

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NL27WZ126
http://onsemi.com
2
MAXIMUM RATINGS
Symbol
Parameter
Value
Units
VCC
DC Supply Voltage
−0.5 to +7.0
V
VI
DC Input Voltage
−0.5 to +7.0
V
VO
DC Output Voltage
−0.5 to +7.0
V
IIK
DC Input Diode Current
VI < GND
−50
mA
IOK
DC Output Diode Current
VO < GND
−50
mA
IO
DC Output Sink Current
±50
mA
ICC
DC Supply Current per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature Range
−65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature under Bias
+150
°C
qJA
Thermal Resistance (Note 1)
250
°C/W
PD
Power Dissipation in Still Air at 85°C
250
mW
MSL
Moisture Sensitivity
Level 1
FR
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
VESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
N/A
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Units
VCC
Supply Voltage
Operating
Data Retention Only
1.65
1.5
5.5
5.5
V
VI
Input Voltage (Note 5)
0
5.5
V
VO
Output Voltage (HIGH or LOW State)
0
5.5
V
TA
Operating Free−Air Temperature
−40
+85
°C
Dt/DV
Input Transition Rise or Fall Rate
VCC = 2.5 V ±0.2 V
VCC = 3.0 V ±0.3 V
VCC = 5.0 V ±0.5 V
0
0
0
20
10
5
ns/V
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.


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