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CYUSB3011-BZXC Datasheet(PDF) 9 Page - Cypress Semiconductor |
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CYUSB3011-BZXC Datasheet(HTML) 9 Page - Cypress Semiconductor |
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9 / 40 page  CYUSB301X Document Number: 001-52136 Rev. *L Page 9 of 40 32-kHz Watchdog Timer Clock Input FX3 includes a watchdog timer. The watchdog timer can be used to interrupt the ARM926EJ-S core, automatically wake up the FX3 in Standby mode, and reset the ARM926EJ-S core. The watchdog timer runs a 32-kHz clock, which may be optionally supplied from an external source on a dedicated FX3 pin. The firmware can disable the watchdog timer. Requirements for the optional 32-kHz clock input are listed in Table 5. Power FX3 has the following power supply domains: ■ IO_VDDQ: This is a group of independent supply domains for digital I/Os. The voltage level on these supplies is 1.8 V to 3.3 V. FX3 provides six independent supply domains for digital I/Os listed as follows (see Table 7 for details on each of the power domain signals): ❐ VIO1: GPIF II I/O ❐ VIO2: IO2 ❐ VIO3: IO3 ❐ VIO4: UART-/SPI/I 2S ❐ VIO5: I 2C and JTAG (supports 1.2 V to 3.3 V) ❐ CVDDQ: Clock ❐ VDD: This is the supply voltage for the logic core. The nominal supply-voltage level is 1.2 V. This supplies the core logic circuits. The same supply must also be used for the following: • AVDD: This is the 1.2-V supply for the PLL, crystal oscilla- tor, and other core analog circuits • U3TXVDDQ/U3RXVDDQ: These are the 1.2-V supply volt- ages for the USB 3.0 interface. ■ VBATT/VBUS: This is the 3.2-V to 6-V battery power supply for the USB I/O and analog circuits. This supply powers the USB transceiver through FX3's internal voltage regulator. VBATT is internally regulated to 3.3 V. Power Modes FX3 supports the following power modes: ■ Normal mode: This is the full-functional operating mode. The internal CPU clock and the internal PLLs are enabled in this mode. ❐ Normal operating power consumption does not exceed the sum of ICC Core max and ICC USB max (see Table 7 for current consumption specifications). ❐ The I/O power supplies VIO2, VIO3, VIO4, and VIO5 can be turned off when the corresponding interface is not in use. VIO1 cannot be turned off at any time if the GPIF II interface is used in the application. ■ Low-power modes (see Table 6 on page 10): ❐ Suspend mode with USB 3.0 PHY enabled (L1) ❐ Suspend mode with USB 3.0 PHY disabled (L2) ❐ Standby mode (L3) ❐ Core power-down mode (L4) Table 4. FX3 Input Clock Specifications Parameter Description Specification Units Min Max Phase noise 100-Hz offset – –75 dB 1- kHz offset – –104 dB 10-kHz offset – –120 dB 100-kHz offset – –128 dB 1-MHz offset – –130 dB Maximum frequency deviation – 150 ppm Duty cycle 30 70 % Overshoot – 3 % Undershoot – –3 % Rise time/fall time – 3 ns Table 5. 32-kHz Clock Input Requirements Parameter Min Max Units Duty cycle 40 60 % Frequency deviation – ±200 ppm Rise time/fall time – 200 ns |
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Similar Description - CYUSB3011-BZXC |
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