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BR262W30A103E1G Datasheet(PDF) 3 Page - ON Semiconductor |
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BR262W30A103E1G Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 28 page BelaSigna R262 http://onsemi.com 3 Table 2. ELECTRICAL CHARACTERISTICS (continued) (The typical parameters in Table 2 were measured at 20°C with a clean 3.3 V supply voltage (unless noted differently). Parameters marked as screened are tested on each chip. Other parameters are qualified for all process corners but not tested on every part.) Parameter Screened Unit Max Typ Min Test Conditions / Notes Symbol VMIC Output voltage VMIC = VREG 0.95 1.00 1.05 V l VMIC = VDDA 1.8 2.0 2.1 V l Load Regulation VMIC = VREG 25 40 mV/mA VMIC = VDDA 100 150 mV/mA POWER ON RESET POR Threshold POR Release (VBAT going up) 1.52 1.60 1.71 V l POR Activation (VBAT going down) 1.52 1.60 1.65 V l Boot Time NRST to DMIC active using LSAD boot method 16.3 ms NRST to DMIC active using SPI EEPROM boot method (Default custom application) 90 ms NRST to DMIC active using I2C EEPROM boot method (Default custom application) 135 ms INPUT STAGE Sampling frequency Fs Defined by ROM−based application. (Note 2) 21.333 kHz Analog input voltage Vin No preamp gain on AI1 and AI3 0 2 Vpp Vin 24 dB preamp gain by default on MIC0 and MIC2 0 125 mVpp Preamplifier gain tolerance 1 kHz −2 2 dB Input impedance Rin 0 dB preamplifier gain 250 kW All other gain settings 510 585 kW l Input offset voltage 0 dB preamp gain 7 mV All other gains 3 mV Channel cross coupling Any 2 channels −84 −60 dB Analog Filter cut−off frequency LPF enabled (default) 10 20 30 kHz LPF disabled 50 kHz Analog Filter passband flatness −1 1 dB Analog filter stopband attenuation 60 dB Digital Filter cut−off frequency Fs/2 kHz Digital Filter cut−off stopband attenuation 80 dB Total Harmonic Distortion + Noise (Peak value) THDN 24 dB preamplifier gain VBAT = 3.3 V −67 −70 dB Dynamic Range DR 24 dB preamplifier gain VBAT = 3.3 V 81 82.5 dB Equivalent Input Noise EIN 24 dB preamplifier gain VBAT = 3.3 V 3.7 mV 2. Processed bandwidth limited to 8 kHz. |
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