MC74LCX374

http://onsemi.com

2

Figure 1. Pinout: 20−Lead (Top View)

19

20

18

17

16

15

14

2

1

3456

7

13

8

12

9

11

10

O7

D7

D6

O6

O5

D5

D4

O4

CP

OE

O0

D0

D1

O1

O2

D2

D3

O3

GND

O0

D0

O1

D1

O2

D2

O3

D3

O4

D4

O5

D5

O6

D6

O7

D7

Figure 2. LOGIC DIAGRAM

nCP

Q

D

nCP

Q

D

nCP

Q

D

nCP

Q

D

nCP

Q

D

nCP

Q

D

nCP

Q

D

nCP

Q

D

CP

OE

3

4

7

8

13

14

17

18

2

5

6

9

12

15

16

19

11

1

PIN NAMES

Function

Output Enable Input

Clock Pulse Input

Data Inputs

3−State Outputs

Pins

OE

CP

D0−D7

O0−O7

TRUTH TABLE

INPUTS

OUTPUTS

OE

CP

Dn

On

OPERATING MODE

L

L

↑

↑

l

h

L

H

Load and Read Register

L

↑

X

NC

Hold and Read Register

H

↑

X

Z

Hold and Disable Outputs

H

H

↑

↑

l

h

Z

Z

Load Internal Register and Disable Outputs

H

= High Voltage Level

h

= High Voltage Level One Setup Time Prior to the Low−to−High Clock Transition

L

= Low Voltage Level

l

= Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition

NC = No Change, State Prior to Low−to−High Clock Transition

X

= High or Low Voltage Level and Transitions are Acceptable

Z

= High Impedance State

↑

= Low−to−High Transition

↑