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CXA2153 Datasheet(PDF) 11 Page - Sony Corporation |
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CXA2153 Datasheet(HTML) 11 Page - Sony Corporation |
11 / 24 page – 11 – CXA2153S I2C BUS Logic System High level input voltage Low level input voltage Low level output voltage SDA during current inflow of 3mA Maximum clock frequency Minimum waiting time for data change Minimum waiting time for data transfer start Low level clock pulse width High level clock pulse width Minimum waiting time for start preparation Minimum data hold time Maximum data preparation time Rise time Fall time Minimum waiting time for stop preparation 1 2 3 4 5 6 7 8 9 10 11 12 13 14 VIH VIL VOL fSCL tBUF tHD; STA tLOW tHIGH tSU; STA tHD; DAT tSU; DAT tR tF tSU; STO 3.0 0 0 0 1.3 0.6 1.3 0.6 0.6 0 100 — — 0.6 — — — — — — — — — — — — — — 5.0 1.5 0.4 400 — — — — — 900 — 1 300 — V V V kHz µs µs µs µs µs ns ns µs ns µs No. Item Symbol Min. Typ. Max. Unit |
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