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CXA2074S Datasheet(PDF) 10 Page - Sony Corporation |
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CXA2074S Datasheet(HTML) 10 Page - Sony Corporation |
10 / 38 page – 10 – CXA2074Q/S 26 27 28 30 28 29 30 31 VE VEWGT VETC VEOUT 4.0V 4.0V 1.7V 4.0V Variable de-emphasis integrating pin. (Connect a 2700pF capacitor and a 3.3k Ω resistor in series between this pin and GND.) Weight the variable de-emphasis control effective value detection circuit. (Connect a 0.047µF capacitor and a 3k Ω resistor in series between this pin and GND.) Determine the restoration time constant of the variable de-emphasis control effective value detection circuit. (The specified restoration time constant can be obtained by connecting a 3.3µF capacitor between this pin and GND.) Variable de-emphasis output pin. (Connect a 4.7µF non-polar capacitor between Pins 31 (30) and 32 (31).) Vcc 4V 36k 2.9V 580 147 580 8k 30k ↓ 8µ 4k ↓ 50µ 29 (27) 20k ↓ 7.5µ 4k ↓ 50µ Vcc × 4 × 4 30 (28) Vcc 10k 580 580 5P 31 (30) 7.5k 147 VCC 28 (26) Pin No. QFP SDIP Symbol Pin voltage Equivalent circuit Description |
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