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PKL14A256TFT4(R) Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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PKL14A256TFT4(R) Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
6 / 20 page Features 4.1 Feature Summary All devices within the KL14 and KL15 family features the following at a minimum: Table 1. Common features among all KL14 and KL15 devices Operating characteristics • 1.71 V to 3.6 V • Temperature range (TA) -40°C to 105°C • Flexible modes of operation Core features • Next generation 32-bit ARM Cortex M0+ core • Support up to 32 interrupt request sources • Nested vectored interrupt controller (NVIC) • Debug & trace capability • 2-pin serial wire debug (SWD) • Micro trace buffer (MTB) System and power management • Software watchdog • Integrated bit manipulation engine (BME) • DMA controller • Low-leakage wake-up unit (LLWU) • Power management controller with 10 different power modes • Non-maskable interrupt (NMI) • 80-bit unique identification (ID) number per chip Clocks • External crystal oscillator or resonator • DC- 48 MHz external square wave input clock • Internal clock references • 31.25 to 39.063 kHz oscillator • 4 MHz oscillator • 1 kHz oscillator • Frequency-locked loop with the range of • 20-25 MHz • 40-48 MHz Memory and memory interfaces • Up to 128 KB with 64 byte flash cache for KL15 and up to 64 KB with 64 byte flash cache for KL14 • Up to 16 KB random-access memory for KL15 and up to 8 KB RAM for KL14 Security and integrity • COP watchdog Analog • 12-bit analog-to-digital converter( ADC) for KL14 and 16-bit ADC with DP channel for KL15 • High speed comparator (HSCMP)with internal 6-bit digital-to-analog converter (DAC) • 12-bit digital-to-analog converter (DAC) for KL15 Timers • One 6-channel and two 2-channel 16-bit TPM modules • 32-bit Programmable interrupt timer (PIT) • Real-time clock (SRTC) • Low-power timer (LPTMR) • System tick timer (SYSTIK) Table continues on the next page... 4 Features KL14/KL15 Product Brief, Rev. 2, 6/2012 6 Preliminary Freescale Semiconductor, Inc. General Business Information |
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