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CXA2050S Datasheet(PDF) 6 Page - Sony Corporation

Part No. CXA2050S
Description  Y/C/RGB/D for PAL/NTSC Color TVs
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Maker  SONY [Sony Corporation]
Homepage  http://www.sony.co.jp
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 6 page
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– 6 –
CXA2050S
14
15
– (R-Y) IN
– (B-Y) IN
Color difference signal inputs.
Clamped to 5.5V at the burst timing.
Standard input levels for 75% CB:
B-Y: 1.33Vp-p
R-Y: 1.05Vp-p
16
SGND2
GND for the RGB block.
1.5k
70k
14
15
Input which combines YS1SW control with
VM circuit ON/OFF function. Supports
with ternary.
VMSW (VthVM = 0.9V)
VILVM
≤ 0.3V VM circuit ON
VIHVM
≥ 1.5V VM circuit OFF
YS1SW (VthYS1 = 2.5V)
VILYS1
≤ 1.7V Y/color difference input
selected
VIHYS1
≥ 3.3V RGB1 input selected
Setting YS1OFF of I2C bus to 1, input for
this pin is invalid.
17
YS1/VM
18
19
20
R1IN
G1IN
B1IN
Analog R, G and B signal inputs.
Input a 0.7Vp-p (no sync, 100 IRE) signal
via a capacitor.
The signal is clamped to 5.7V at the burst
timing of the signal input to the HSIN
input (Pin 53).
21
YS2
YM/YS2SW YS2 control input.
When YS2 is high, the RGB2 block signal
is selected; when YS2 is low, the YS1SW
output signal is selected.
VILMAX = 0.4V
VIHMIN = 1.0V
100µA
20k
17
10k
30k
200
18
19
20
100µA
40k
21
22
YM
YM/YS2 SW YM control input.
When YM is high, the YS1SW output
signal is attenuated by 6dB.
VILMAX = 0.4V
VIHMIN = 1.0V
100µA
40k
22
Pin
No.
Symbol
Equivalent circuit
Description




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