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CXA2039M Datasheet(PDF) 6 Page - Sony Corporation |
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CXA2039M Datasheet(HTML) 6 Page - Sony Corporation |
6 / 11 page 11 24 12 12 8 9 9 10 10 9 9 10 10 9 10 8 9 10 12 – 6 – CXA2039M Electrical Characteristics Setting conditions • Ta = 25°CVCC = 9V • Set initially to: YUV SW = 0V, LEVEL = 0V, DLY SW = 0V, COLOR = 4.5V, HUE = 4.5V, Y SW = 0V. (when inputting the signals from Y2 IN, RY2 IN and BY2 IN) Symbol ICC VTV1 VTV2 VY VRY1 VRY2 VBY1 VBY2 Cmax. Cmin. Hmax. Hmin. RYDLY BYDLY fY fRY fBY fTV Mea- sure- ment pin Input signal Measurement conditions and contents Vcc pin inflow current I/O gain I/O gain I/O gain I/O gain Set the output when COLOR = 4.5V to 0dB and measure the output when COLOR = 9V. Set the output when COLOR = 4.5V to 0dB and measure the output when COLOR = 0 V. tan–1 = when HUE = 9V tan–1 = when HUE = 0V DLY SW = 3V. Measure the I/O delay. DLY SW = 3V. Measure the I/O delay. Y SW = 3V. Measure the 200kHz gain with respect to 5MHz. Item Current consumption TV OUT output gain TV OUT output gain Y OUT output gain RY OUT output gain RY OUT output gain BY OUT output gain BY OUT output gain Color variable range 1 Color variable range 2 Hue variable range 1 Hue variable range 2 RY OUT Delay BY OUT Delay Y OUT frequency response RY OUT frequency response BY OUT frequency response TV OUT frequency response 14 –7.0 –1.0 –7.0 –7.0 –6.6 –4.7 –4.3 5.3 40 530 530 –1.0 –6.0 –8.0 –1.0 19 –6.2 0 –6.2 –5.3 –4.7 –3.1 –2.3 6.1 –40 48 –48 600 600 0 –3.5 –5.0 0 Max. Typ. Min. 24 –5.0 1.0 –5.0 –4.0 –4.0 –1.7 –1.3 6.8 –30 –40 680 680 1.0 0 –1.0 1.0 Unit mA dB dB dB dB dB dB dB dB dB Deg. Deg. ns ns dB dB dB dB No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1.4Vp-p 200kHz, 5MHz Y signal 200kHz, 5MHz 1.4Vp-p R-Y and B-Y signal 0.7Vp-p B-Y = 0.7Vp-p R-Y = 0.5Vp-p Y: 1.4Vp-p R-Y, B-Y: 0.7Vp-p Gain SW = Low MODE LEVEL ≤ 6V Gain SW = High MODE LEVEL ≥ 6.8V Gain SW = Low MODE LEVEL ≤ 6V Gain SW = High MODE LEVEL ≥ 6.8V Gain SW = Low MODE LEVEL ≤ 6V Gain SW = High MODE LEVEL ≥ 6.8V Output level during RY signal input only Output level during BY signal input only Output level during RY signal input only Output level during BY signal input only |
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