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SN55LVDS32-SP Datasheet(PDF) 8 Page - Texas Instruments |
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SN55LVDS32-SP Datasheet(HTML) 8 Page - Texas Instruments |
8 / 19 page B A G G VO ± 500 Ω VTEST 10 pF (see Note B) 1.2 V tPZL tPLZ tPZL tPLZ tPZH tPHZ tPZH tPHZ 2.5 V 1 V 2 V 1.4 V 0.8 V 2 V 1.4 V 0.8 V 2.5 V 1.4 V VOL + 0.5 V VOL 0 1.4 V 2 V 1.4 V 0.8 V 2 V 1.4 V 0.8 V VOH VOH - 0.5 V 1.4 V 0 VTEST A G, 1,2EN, or 3,4EN G Y VTEST A G Y Inputs (see Note A) 1,2EN or 3,4EN G, 1,2EN, or 3,4EN A. All input pulses are supplied by a generator having the following characteristics: tr or tf≤ 1 ns, pulse repetition rate(PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. B. CL includes instrumentation and fixture capacitance within 6 mm of the D.U.T. SN55LVDS32-SP SLLSEB4 – MARCH 2012 www.ti.com Figure 4. Enable- and Disable-Time Test Circuit and Waveforms TYPICAL CHARACTERISTICS 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): SN55LVDS32-SP |
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