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SN55LVDS31-SP Datasheet(PDF) 8 Page - Texas Instruments |
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SN55LVDS31-SP Datasheet(HTML) 8 Page - Texas Instruments |
8 / 13 page 10 1 0.1 100 Signaling Rate − Mbps TRANSMISSION DISTANCE vs SIGNALING RATE 10 100 1000 5% Jitter (see Note A) 30% Jitter (see Note A) 24 AWG UTP 96 Ω (PVC Dielectric) 1A 1Y 1Z G 2Z 2Y 2A GND VCC 4A 4Y 4Z G 3Z 3Y 3A 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ZO = 100 Ω ZO = 100 Ω ZO = 100 Ω ZO = 100 Ω 3.3 V 0.1 µF (see Note A) 0.001 µF (see Note A) VCC See Note B NOTES: A. Place a 0.1- µF and a 0.001-µF Z5U ceramic, mica, or polystyrene dielectric, 0805 size, chip capacitor between VCC and the ground plane. The capacitors should be located as close as possible to the device terminals. B. Unused enable inputs should be tied to VCC or GND, as appropriate. SN55LVDS31-SP SLLSEB5 – MARCH 2012 www.ti.com APPLICATION INFORMATION The SN55LVDS31 is generally used as a building block for high-speed point-to-point data transmission where ground differences are less than 1 V. The SN55LVDS31 can interoperate with RS-422, PECL, and IEEE-P1596. Drivers/receivers approach ECL speeds without the power and dual supply requirements. A. This parameter is the percentage of distortion of the unit interval (UI) with a pseudorandom data pattern. Figure 8. Typical Transmission Distance Versus Signaling Rate Figure 9. Typical Application Circuit Schematic 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): SN55LVDS31-SP |
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