For technical support and more information, see inside back cover or visit www.ti.com

Application Notes

Pin-Coded Output Voltage Programming of the

30-A Rated PT8120 Series Regulators

The PT8120 series of Excalibur® ISRs incorporate a

pin-coded output voltage control. These regulators must

be programmed to a specific output voltage from a pre-

set range defined by the regulator model. Programming

is achieved by selectively connecting the control inputs,

The programming code and voltage range for each model

is defined in the data sheet. Refer to the PT8120 Series

data sheet for more information. The program codes for

the PT8121, PT8122, and PT8124 models are also com-

patible with some of the “Voltage ID” codes defined by

Intel’s® VRM specifications. Figure 1 shows the pin-strap

connections for selecting the desired output voltage from

the program code range.

Notes:

1. The programming convention is as follows:-

Logic 0:

Connect to pin 11 (VID Common).

Logic 1:

Open circuit/open drain (See notes 2, & 4)

2. Do not connect pull-up resistors to the voltage

programming pins.

3. To minimize output voltage error, use pin 11 (VID

Common) as the logic “0” reference. If the regulator is

used to power a VRM compatible microprocessor this

may not be practical. In this case connect pin 11 to pins

17–22, or the ground plane close to the regulator.

Figure 1

4. If active devices are used to ground the voltage control

pins, low-level open drain MOSFETs should be used over

introduces errors in the device’s internal voltage control

circuit. Discrete transistors such as the BSS138, 2N7002,

IRLML2402, are examples of appropriate devices.

Active Voltage Programming:

Special precautions should be taken when making changes

to the voltage control progam code while the output is

active. It is recommended that the ISR be powered down

or held placed in standby. Changes made to the program

through the device. This is the result of the electrolytic

output capacitors being either charged or discharged to the

new output voltage set-point. The transient current can be

minimized by making only incremental changes to the

binary code, i.e. one LSB at a time. A minimum of 100µs

settling time between each program state is also recom-

mended. Making non-incremental changes to VID3 and

VID4 with the output enabled is discouraged. The tran-

sients induced may activate the module’s over-current

protection. If the program code cannot be asserted prior

to power-up, pull pin 6, STBY*, to GND during the

period that the input voltage is applied. The release of

pin 6 will then to allow the device to initiate a soft-start

power-up to the program voltage.

PT8120 Series & PT8139

L

O

A

D

C

OUT

+

C

IN

+

V

IN

V

GND

V

L

in

1µH

GND

PT8121

43

21

31

23–30

617–22

12–16

5

11

VID4 – VID0

Sense

V

IN

V

OUT

STBY

GND

VID

Common

VID0

VID1

VID2

VID3

VID4