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NS32FX161-20 Datasheet(PDF) 11 Page - Texas Instruments |
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NS32FX161-20 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 104 page  20 Architectural Description (Continued) The X Y and Z registers are used for addressing up to three vector operands They are 32-bit registers with three fields ADDRESS INCREMENT and WRAP-AROUND The value in the ADDRESS field specifies the address of a word in the on-chip memory This field has 16 bits and can ad- dress up to 64 Kwords of internal memory The ADDRESS fields are initialized with the vector operands’ start-address- es by commands in the command list At the beginning of each vector operation the contents of the ADDRESS field are copied to incrementors Increments can be used by vec- tor instructions to step through the corresponding vector operands while executing the appropriate calculations There is an address wrap-around for those vector instruc- tions that require some of their operands to be located in cyclic buffers The allowed values for the increment field are 0 through 15 The actual increment will be 2increment words The allowed values for the WRAP-AROUND field are 0 through 15 The actual wrap-around will be 2WRAP-AROUND words The WRAP-AROUND must be greater or equal to the INCREMENT The X Y and Z registers can be read and written by the core These registers can be read and written by the com- mand-list execution unit as well as by the core when using SX SXL SXH SY SZ LX LY and LZ instructions EABRExternal Address Base Register The format of the external address base register is shown in Figure 2-7 31 17 16 0 ADDRESS 0 FIGURE 2-7 EABR Register Format The EABR register is used together with a 16-bit address field to form a 32-bit external address External addresses are specified as the sum of the value in EABR and two times the value of the 16-bit address pointed by registers X Y or Z The only value allowed to be written into bits 0 through 16 of EABR is ‘‘0’’ The EABR register can be read and written by the core It can also be written by the command-list exe- cution unit by using the LEABR instruction EABR can hold any value except for FFFE0000 Accessing external memory with an FFFE0000 in the EABR will cause unpredictable results CLPTRCommand List Pointer The CLPTR is a 16-bit register that holds the address of the current command in the internal RAM Writing into the CLPTR causes the DSPM command-list execution unit to begin executing commands starting from the address in CLPTR The CLPTR can be read and written by the core while the command-list execution is idle Whenever the DSPM command-list execution unit reads a command from the DSPM RAM the value of CLPTR is up- dated to contain the address of the next command to be executed This implies for example that if the last com- mand in a list is in address N the CLPTR will hold a value of N a 1 following the end of command list execution OVFOverflow Register The format of the overflow register is shown in Figure 2-8 15 2 1 0 Reserved OVF SAT FIGURE 2-8 OVF Register Format The OVF register holds the current status of the DSPM arithmetic unit It has two fields OVF and SAT The OVF bit is set to ‘‘1’’ whenever an overflow is detected in the DSPM 34-bit ALU (eg bits 32 and 33 of the ALU are not equal) No overflow detection is provided for integers The SAT bit is set to ‘‘1’’ whenever a value read from the accumulator cannot be represented within the limits of its data type (eg 16 bits for real and integer and 31 bits for extended real) In this case the value read from the accumulator will either be the maximum allowed value or the minimal allowed value for this data type depending on the sign of the accumulator value Note that in some cases when the OVF is set the SAT will not be set The reason is that if an OVF occurred the value in the accumulator can no longer be used for proper SAT detection Upon reset and whenever the ABORT register is written the non reserved bits of the OVF register is cleared to ‘‘0’’ The OVF is a read only register It can be read by the core It can also be read by the command-list execution unit using the SOVF instruction Reading the OVF by either the core or the command-list execution unit clears it to ‘‘0’’ PARAMVector Parameter Register The format of the PARAM register is shown in Figure 2-9 31 26 25 24 19 18 17 16 15 0 Reserved RND OP SUB CLR COJ LENGTH FIGURE 2-9 PARAM Register Format The PARAM register is used to specify the number of itera- tions and special options for the various instructions The options are RND OP SUB CLR and COJ The effect of each of the bits of the PARAM register is specified in Sec- tion 34 The PARAM register can be read and written by the core It can also be written by the command-list execution unit by using the LPARAM instruction The value written into PAR- AMLENGTH must be greater then 0 The value of PARAMLENGTH is not changed during com- mand-list execution unless it is written into using the LPARAM instruction REPEATCommand-List Repeat Register The format of the repeat register is shown in Figure 2-10 31 16 15 0 COUNT TARGET FIGURE 2-10 REPEAT Register Format The REPEAT register is used together with appropriate commands to implement loops and branches in the com- mand list The count is used to specify the number of times a loop in the command list is to be repeated The target is used to specify a jump address within the command list The REPEAT register can be read and written by the core It can also be read and written by the command-list execution unit by using SREPEAT and LREPEAT instructions respec- tively The value of REPEATCOUNT changes during the execu- tion of the DJNZ command ABORTAbort Register The ABORT register is used to force execution of the com- mand list to halt Writing any value into this register stops execution and clears the contents of OVF EXT DSPINT and DSPMASK The ABORT register can only be written and only by the core 10 |
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