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TPS54380QPWPRQ1 Datasheet(PDF) 2 Page - Texas Instruments |
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TPS54380QPWPRQ1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 18 page TPS54380-Q1 SLVS836 − JUNE 2008 www.ti.com 2 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION(1) TJ PACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING −40 °C to 125°C HTSSOP − PW Reel of 2000 TPS54380QPWPRQ1 54380Q (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. (2)) Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1) VIN, ENA −0.3 V to 7 V It lt V RT −0.3 V to 6 V Input voltage range, VI VSENSE, TRACKIN −0.3 V to 4 V BOOT −0.3 V to 17 V Ot t lt V VBIAS, COMP, PWRGD −0.3 V to 7 V Output voltage range, VO PH −0.6 V to 10 V St I PH Internally Limited Source current, IO COMP, VBIAS 6 mA PH 6 A Sink current, IS COMP 6 mA Sink current, IS ENA, PWRGD 10 mA Voltage differential AGND to PGND ±0.3 V Operating virtual-junction temperature range, TJ −40 °C to 125°C Storage temperature, Tstg −65 °C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300 °C Human-Body Model (HBM) 2000 V Electrostatic discharge protection, ESD Charged-Device Model (CDM) 1500 V (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT Input voltage, VI 3 6 V Operating junction temperature, TJ −40 125 °C DISSIPATION RATINGS(1)(2) PACKAGE THERMAL IMPEDANCE JUNCTION-TO-AMBIENT TA =25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING 20-pin PWP with solder 26 °C/W 3.85 W(3) 2.12 W 1.54 W 20-pin PWP without solder 57.5 °C/W 1.73 W 0.96 W 0.69 W (1) For more information on the PWP package, see TI technical brief, literature number SLMA002. (2) Test board conditions: 1. 3-in x 3-in, two layers, thickness: 0.062 in 2. 1.5-oz copper traces located on the top of the PCB 3. 1.5-oz copper ground plane on the bottom of the PCB 4. 10 thermal vias (see “Recommended Land Pattern” in applications section of this data sheet) (3) Maximum power dissipation may be limited by overcurrent protection. |
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