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TPS3813K33QDBVRQ1 Datasheet(PDF) 6 Page - Texas Instruments

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Part # TPS3813K33QDBVRQ1
Description  PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

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WDI
WDR
WDT
GND
TPS3813
I/O
GND
Position1
Position2
Position3
Position5
Position4
R
mC
C
(ext)
V
DD
V
DD
V
DD
0.1 F
m
0.1 F
m
V
DD
V
DD
RESET
RESET
TPS3813J25-Q1, TPS3813L30-Q1
TPS3813K33-Q1, TPS3813I50-Q1
SPRS288B – MAY 2008 – REVISED APRIL 2012
www.ti.com
Application Example
A typical application example (see Figure 4) is used to describe the function of the watchdog in more detail.
To configure the window watchdog function, two pins are provided by the TPS3813. These pins set the window
timeout and ratio.
The window watchdog ratio is a fixed ratio, which determines the lower boundary of the window frame. It can be
configured in two different frame sizes.
If the window watchdog ratio pin (WDR) is set to VDD, Position 1 in Figure 4, then the lower window frame is a
value based on a ratio calculation of the overall window timeout size: For the watchdog timeout pin (WDT)
connected to GND, it is a ratio of 1:124.9, for WDT connected to VDD, it is a ratio of 1:127.7, and for an external
capacitor connected to WDT, it is a ratio of 1:64.5.
If the window watchdog ratio pin (WDR) is set to GND, Position 2, the lower window frame will be a value based
on a ratio calculation of the overall window timeout size: For the watchdog timeout pin (WDT) connected to GND,
it will be a ratio of 1:31.8, for WDT connected to VDD it will be 1:32, and for an external capacitor connected to
WDT it will be 1:25.8.
The watchdog timeout can be set in two fixed timings of 0.25 second and 2.5 seconds for the window or can by
programmed by connecting a external capacitor with a low leakage current at WDT.
Example: If the watchdog timeout pin (WDT) is connected to VDD, the timeout is 2.5 seconds. If the window
watchdog ratio pin (WDR) is set in this configuration to a ratio of 1:127.7 by connecting the pin to VDD, the lower
boundary is 19.6 ms.
Figure 4. Application Example
6
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Copyright © 2008–2012, Texas Instruments Incorporated


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