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TM16EN64LPU Datasheet(PDF) 11 Page - Texas Instruments |
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TM16EN64LPU Datasheet(HTML) 11 Page - Texas Instruments |
11 / 21 page TM16EN64HPU, TM16EN64LPU 16777216 BY 64BIT TM16EN72HPU, TM16EN72LPU 16777216 BY 72BIT EXTENDEDDATAOUT DYNAMIC RAM MODULES SMMS695A − AUGUST 1997 − REVISED NOVEMBER 1997 11 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 capacitance over recommended ranges of supply voltage and ambient temperature, f = 1 MHz (see Note 2) PARAMETER ’16EN64xPU ’16EN72xPU UNIT PARAMETER MIN MAX MIN MAX UNIT Ci(A) Input capacitance, A0 − A12 82 92 pF Ci(OE) Input capacitance, OEx 58 65 pF Ci(CAS) Input capacitance, CASx 16 23 pF Ci(RAS) Input capacitance, RASx 58 65 pF Ci(W) Input capacitance, WEx 58 65 pF Co Output capacitance 8 8 pF NOTE 2: VDD = NOM supply voltage ± 10%, and the bias on pins under test is 0 V. switching characteristics over recommended ranges of supply voltage and ambient temperature (see Note 3) PARAMETER ’16ENxxxPU-40 ’16ENxxxPU-50 ’16ENxxxPU-60 UNIT PARAMETER MIN MAX MIN MAX MIN MAX UNIT tAA Access time from column address (see Note 4) 20 25 30 ns tCAC Access time from CASx (see Note 4) 11 13 15 ns tCPA Access time from CASx precharge (see Note 4) 22 28 35 ns tRAC Access time from RASx (see Note 4) 40 50 60 ns tOEA Access time from OEx (see Note 4) 11 13 15 ns tCLZ Delay time, CASx to output in low impedance 0 0 0 ns tREZ Output buffer turn off delay from RASx (see Note 5) 3 11 3 13 3 15 ns tCEZ Output buffer turn off delay from CASx (see Note 5) 3 11 3 13 3 15 ns tOEZ Output buffer turn off delay from OEx (see Note 5) 3 11 3 13 3 15 ns tWEZ Output buffer turn off delay from WEx (see Note 5) 3 11 3 13 3 15 ns NOTES: 3. With ac parameters, it is assumed that tT = 2 ns. 4. Access times are measured with output reference levels of VOH = 2 V and VOL = 0.8 V. 5. The maximum values of tREZ, tCEZ, tOEZ, and tWEZ are specified when the output is no longer driven. Data in should not be driven until one of the applicable maximum specs is satisfied. EDO timing requirements ’16ENxxxPU-40 ’16ENxxxPU-50 ’16ENxxxPU-60 UNIT MIN MAX MIN MAX MIN MAX UNIT tHPC Cycle time, EDO page mode, read-write 16 20 25 ns tPRWC Cycle time, EDO read-write 47 57 68 ns tCSH Delay time, RASx active to CASx precharge 32 40 48 ns tCHO Hold time, OEx from CASx 5 5 5 ns tDOH Hold time, output from CASx 5 5 5 ns tCAS Pulse duration, CASx active (see Note 6) 6 10 000 8 10 000 10 10 000 ns tWPE Pulse duration, WEx active (output disable only) 5 5 5 ns tOCH Setup time, OEx before CASx 5 5 5 ns tCP Pulse duration, CASx precharge 6 8 10 ns tOEP Precharge time, OEx 5 5 5 ns NOTE 6: In a read-write cycle, tCWD and tCWL must be observed. |
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