SN74LVC1G126EP

SINGLE BUS BUFFER GATE

WITH 3STATE OUTPUT

SCES527A − DECEMBER 2003 − REVISED MAY 2004

3

POST OFFICE BOX 655303

recommended operating conditions (see Note 4)

MIN

MAX

UNIT

VCC

Supply voltage

Operating

1.65

5.5

V

VCC

Supply voltage

Data retention only

1.5

V

VCC = 1.65 V to 1.95 V

0.65

× VCC

VIH

High-level input voltage

VCC = 2.3 V to 2.7 V

1.7

V

VIH

High-level input voltage

VCC = 3 V to 3.6 V

2

V

VCC = 4.5 V to 5.5 V

0.7

× VCC

VCC = 1.65 V to 1.95 V

0.35

× VCC

VIL

Low-level input voltage

VCC = 2.3 V to 2.7 V

0.7

V

VIL

Low-level input voltage

VCC = 3 V to 3.6 V

0.8

V

VCC = 4.5 V to 5.5 V

0.3

× VCC

VI

Input voltage

0

5.5

V

VO

Output voltage

0

VCC

V

VCC = 1.65 V

−4

VCC = 2.3 V

−8

IOH

High-level output current

VCC = 3 V

−16

mA

IOH

High-level output current

VCC = 3 V

−24

mA

VCC = 4.5 V

−32

VCC = 1.65 V

4

VCC = 2.3 V

8

IOL

Low-level output current

VCC = 3 V

16

mA

IOL

Low-level output current

VCC = 3 V

24

mA

VCC = 4.5 V

32

VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V

20

∆t/∆v

Input transition rise or fall rate

VCC = 3.3 V ± 0.3 V

10

ns/V

∆t/∆v

Input transition rise or fall rate

VCC = 5 V ± 0.5 V

5

ns/V

TA

Operating free-air temperature

−40

85

°C

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.