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UC2825AQDWREPG4 Datasheet(PDF) 7 Page - Texas Instruments |
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UC2825AQDWREPG4 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 21 page R T + 3 V (10 mA) 1 * DMAX C T + 1.6 D MAX R T f (1) UDG−95102 R C CT RT IR 3 V IC−IR CLK ID = 10 mA LEB VTH 1 k 10 k 70 75 80 85 90 95 100 100 k RT − Timing Resistance − W MAXIMUM DUTY CYCLE vs TIMING RESISTANCE 10 M 1 M 100 k 10 k 1 k 10 k 100 k RT − Timing Resistance − W OSCILLATOR FREQUENCY vs TIMING RESISTANCE UC2825A-EP www.ti.com SGLS305D – JULY 2005 – REVISED SEPTEMBER 2010 APPLICATION INFORMATION The oscillator of the UC2825A-EP is a sawtooth. The rising edge is governed by a current controlled by the RT pin and value of capacitance at the CT pin (CCT). The falling edge of the sawtooth sets dead time for the outputs. Selection of RT should be done first, based on desired maximum duty cycle. CT then can be chosen, based on the desired frequency (RT) and DMAX. The design equations are: Recommended values for RT range from 1 kΩ to 100 kΩ. Control of DMAX less than 70% is not recommended. Figure 1. Oscillator Figure 2. Figure 3. Copyright © 2005–2010, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): UC2825A-EP |
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