CONTROL METHODS

UDG-95109

UDG-95110

Current Mode

Voltage Mode

.

SYNCHRONIZATION

UDG-95113

UDG-95112

UC1825A-SP

Figure 8. Control Methods

The oscillator can be synchronized by an external pulse inserted in series with the timing capacitor. Program the

free running frequency of the oscillator to be 10% to 15% slower than the desired synchronous frequency. The

pulse width should be greater than 10 ns and less than half the discharge time of the oscillator. The rising edge

of the CLK/LEB pin can be used to generate a synchronizing pulse for other chips. Note that the CLK/LEB pin no

longer accepts an incoming synchronizing signal.

Figure 9. General Oscillator Synchronization

Figure 10. Two Unit Interface

Figure 11. Operational Waveforms

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