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TPS728285180YZUR Datasheet(PDF) 2 Page - Texas Instruments |
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TPS728285180YZUR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 24 page www.ti.com ABSOLUTE MAXIMUM RATINGS (1) DISSIPATION RATINGS TPS728xx Series SBVS095 – AUGUST 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT VOUT (2) TPS728vvvxxxyyyz VVV is the nominal output voltage for VOUT1 and corresponds to VSET = Low. XXX is the nominal output voltage for VOUT2 and corresponds to VSET = High. YYY is package designator. Z is Tape and reel quantity (R = 3000, T = 250). (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (2) Output voltages from 0.9V to 3.6V in 50mV increments are available through the use of innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability. At TJ = –40°C to +125°C (unless otherwise noted). All voltages are with respect to GND. PARAMETER TPS728xx Series UNIT Input voltage range, VIN –0.3 to +7.0 V Enable and VSET voltage range, VEN and VSET –0.3 to VIN + 0.3 (2) V Output voltage range, VOUT –0.3 to +7.0 V Maximum output current, IOUT Internally limited Output short-circuit duration Indefinite Total continuous power dissipation, PDISS See Dissipation Ratings Table Human body model (HBM) 2 kV ESD rating Charged device model (CDM) 500 V Operating junction temperature range, TJ –55 to +150 °C Storage temperature range, TSTG –55 to +150 °C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) VEN and VSET absolute maximum rating is VIN + 0.3V or +7.0V, whichever is less. DERATING FACTOR BOARD PACKAGE RθJC RθJA ABOVE TA = +25°C TA < +25°C TA = +70°C TA = +85°C High-K(1) DRV 20 °C/W 65 °C/W 15.4mW/ °C 1540mW 845mW 615mW High-K(1) YZU 85 °C/W 268 °C/W 3.7mW/ °C 370mW 205mW 150mW (1) The JEDEC high-K (2s2p) board used to derive this data was a 3- × 3-inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. 2 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated |
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