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TPS54329EDDA Datasheet(PDF) 2 Page - Texas Instruments |
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TPS54329EDDA Datasheet(HTML) 2 Page - Texas Instruments |
2 / 24 page TPS54329E SLVSAZ5A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION(1) TRANSPORT TA PACKAGE(2) (3) ORDERABLE PART NUMBER PIN MEDIA TPS54329EDDA Tube –40°C to 85°C DDA 8 TPS54329EDDAR Tape and Reel (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (3) All package options have Cu NIPDAU lead/ball finish. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT MIN MAX VIN, EN –0.3 20 VBST –0.3 26 VBST (10 ns transient) –0.3 28 Input voltage range VBST (vs SW) –0.3 6.5 V VFB, SS –0.3 6.5 SW –2 20 SW (10 ns transient) –3 22 VREG5 –0.3 6.5 Output voltage range V GND –0.3 0.3 Voltage from GND to thermal pad, Vdiff –0.2 0.2 V Human Body Model (HBM) 2 kV Electrostatic discharge Charged Device Model (CDM) 500 V Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –55 150 (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. THERMAL INFORMATION TPS54329E THERMAL METRIC(1) UNITS DDA (8 PINS) θJA Junction-to-ambient thermal resistance 42.1 θJCtop Junction-to-case (top) thermal resistance 50.9 θJB Junction-to-board thermal resistance 31.8 °C/W ψJT Junction-to-top characterization parameter 5 ψJB Junction-to-board characterization parameter 13.5 θJCbot Junction-to-case (bottom) thermal resistance 7.1 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s) :TPS54329E |
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