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TLV70130DBVT Datasheet(PDF) 7 Page - Texas Instruments |
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TLV70130DBVT Datasheet(HTML) 7 Page - Texas Instruments |
7 / 13 page P D(max) + T J max * TA R q JA P D + VIN * VOUT I OUT TLV701xx www.ti.com SBVS161 – NOVEMBER 2011 APPLICATION INFORMATION The TLV701xx series of devices belong to a family of ultralow, IQ, low-dropout (LDO) regulators. IQ remains fairly constant over the complete output load current and temperature range. The devices are ensured to operate over a temperature range of –40°C to +125°C. INPUT AND OUTPUT CAPACITOR REQUIREMENTS The TLV701 requires a 1- µF or larger capacitor connected between OUT and GND for stability. Ceramic or tantalum capacitors can be used. Larger value capacitors result in better transient and noise performance. Although an input capacitor is not required for stability, when a 0.1- µF or larger capacitor is placed between IN and GND, it counteracts reactive input sources and improves transient and noise performance. Higher value capacitors are necessary if large, fast rise time load transients are anticipated. BOARD LAYOUT RECOMMENDATIONS Input and output capacitors should be placed as close to the device pins as possible. To avoid interference of noise and ripple on the board, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with the ground plane connected only at the device GND pin. In addition, the ground connection for the output capacitor should be connected directly to the device GND pin. POWER DISSIPATION AND JUNCTION TEMPERATURE To ensure reliable operation, worst-case junction temperature should not exceed +125 °C. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum power dissipation limit is determined using Equation 1: (1) where: TJmax is the maximum allowable junction temperature. RθJA is the thermal resistance junction-to-ambient for the package. TA is the ambient temperature. The regulator dissipation is calculated using Equation 2: (2) Power dissipation that results from quiescent current is negligible. REGULATOR PROTECTION The TLV701xx series of LDO regulators use a PMOS-pass transistor that has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (for example, during power-down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TLV701xx features internal current limiting. During normal operation, the TLV701xx limits output current to approximately 250 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. Take care not to exceed the rated maximum operating junction temperature of +125 °C. Continuously running the device under conditions where the junction temperature exceeds +125°C degrades device reliability. The ability to remove heat from the die is different for each package type, presenting different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves heatsink effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of the output current and the voltage drop across the output pass element, as shown in Equation 2. Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 7 |
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