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CLVCC3245AIDBREP Datasheet(PDF) 10 Page - Texas Instruments |
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CLVCC3245AIDBREP Datasheet(HTML) 10 Page - Texas Instruments |
10 / 19 page SN74LVCC3245AEP OCTAL BUS TRANSCEIVER WITH ADJUSTABLE OUTPUT VOLTAGE AND 3STATE OUTPUTS SCAS773A − JUNE 2004 − REVISED MARCH 2005 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION FOR A AND B PORT VCCA AND VCCB = 3.6 V From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 7 V Open GND 500 Ω 500 Ω 2.7 V 0 V tw VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NONINVERTING OUTPUTS VOLTAGE WAVEFORMS PULSE DURATION tPLH tPHL VOH VOL Output Control Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at Open (see Note B) VOL VOH tPZL tPZH tPLZ tPHZ 3.5 V 0 V VOL + 0.3 V VOH − 0.3 V ≈0 V 2.7 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING Output tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7 V Open TEST S1 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. All parameters and waveforms are not applicable to all devices. Input 2.7 V 0 V Input 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V Figure 4. Load Circuit and Voltage Waveforms |
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