www.ti.com

FEATURES

3

2

4

6

1

1A

1Y

2Y

GND

2A

DCK PACKAGE

(TOP VIEW)

See mechanical drawings for dimensions.

5

DESCRIPTION/ORDERING INFORMATION

SN74LVC2G34-EP

DUAL BUFFER GATE

SCES671 – MARCH 2007

• Controlled Baseline

• Supports 5-V V

–

One Assembly Site

• Inputs Accept Voltages to 5.5 V

–

One Test Site

• Max t

–

One Fabrication Site

• Low-Power Consumption, 10-µA Max I

CC

• Extended Temperature Performance of –55°C

• ±24-mA Output Drive at 3.3 V

to 125

°C

• Typical V

• Enhanced Diminishing Manufacturing Sources

<0.8 V at V

(DMS) Support

• Typical V

• Enhanced Product-Change Notification

>2 V at V

• I

Operation

(1)

Component qualification in accordance with JEDEC and

• Latch-Up Performance Exceeds 100 mA Per

industry standards to ensure reliable operation over an

JESD 78, Class II

extended temperature range. This includes, but is not limited

to, Highly Accelerated Stress Test (HAST) or biased 85/85,

• ESD Protection Exceeds JESD 22

temperature cycle, autoclave or unbiased HAST,

–

2000-V Human-Body Model (A114-A)

electromigration, bond intermetallic life, and mold compound

life. Such qualification testing should not be viewed as

–

200-V Machine Model (A115-A)

justifying use of this component beyond specified

performance and environmental limits.

–

1000-V Charged-Device Model (C101)

performs the Boolean function Y = A in positive logic.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

preventing damaging current backflow through the device when it is powered down.

ORDERABLE PART NUMBER

–55

°C to 125°C

SOT (SC-70) – DCK

Reel of 3000

SN74LVC2G34MDCKREP

CAZ

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

Web site at www.ti.com.

(2)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(3)

The actual top-side marking has one additional character that designates the assembly/test site.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.