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TPS65232A2DCAR Datasheet(PDF) 11 Page - Texas Instruments |
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TPS65232A2DCAR Datasheet(HTML) 11 Page - Texas Instruments |
11 / 31 page I = LIM R I TRIP TRIP · 10 · RDS(ON) ¾ TPS65232 www.ti.com SLVSA42 – FEBRUARY 2010 OVER CURRENT PROTECTION Over current protection (OCP) for BUCK1 is achieved by comparing the drain-to-source voltage of the low-side MOSFET to a set-point voltage, which is defined by both the internal current source, ITRIP, and the external resistor connected between the TRIP pin and ground. Over current threshold is calculated as follows: (1) ITRIP has a typical value of 10 mA at 25°C and a temperature coefficient of 3700 ppm/°C to compensate the temperature dependency of the MOS RDS(ON). The TPS65232 supports cycle-by-cycle over current limiting control which means that the controller compares the drain-to-source voltage of the low-side FET to the set-point voltage once per switching cycle and blanks out the next switching cycle if an over-current condition is detected. If in the following cycle over current condition is detected again, the controller blanks out 2, then 4, 8, and up to 16 cycles before turning on the high-side driver again. In an over current condition the current to the load exceeds the current to the output capacitor thus the output voltage will drop, and eventually cross the under voltage protection threshold and shut down the BUCK controller. Buck 2 and 3 show a similar mode of operation. All converters operate in “hiccup mode”: Once an over-current is sensed, the controller shuts off the converter for a given time and then tries to start again. If the overload has been removed, the converter will ramp up and operate normally. If this is not the case, the converter will see another over-current event and shuts down again repeating the cycle until the failure is cleared. SOFT START Soft start for all three BUCKs is controlled by a single capacitor connected to the SS pin and an internal current source. When one of the BUCKs is enabled, the SS capacitor is pre-charged to the output voltage divided by the feed-back ratio before the internal SS current source starts charging the external capacitor. The output voltage of the BUCK ramps up as the SS pin voltage increased from its pre-charged value to 0.8 V. The soft start time is calculated from the SS supply current (ISS) and the capacitor value and has a typical value of 0.4 ms/nF or 1.3 ms for a 3.3-nF capacitor connected to the SS pin. Before the next rail is enabled, the SS cap is discharged and the SS cycle starts over again. UNDER VOLTAGE LOCKOUT (UVLO) TPS65232 monitors VIN and VINB pin voltages and will disable one or more power paths depending on the current use condition: • If VIN drops below 4.7 V, BUCK1, 2, and 3 are disabled. • If VINB drops below 4.25 V and either BUCK2 or BUCK3 are enabled, all three output rails are disabled. UVLO state is not latched and the system recovers as soon as the input voltage rises above its respective threshold. All three BUCK_ENx pins are discharged and remain discharged during UVLO to ensure proper power sequencing when the system recovers. THERMAL SHUTDOWN (TSD) TPS65232 monitors junction temperature and will disable the power path (BUCK1-3) if junction temperature rises above the specified trip point. All three BUCK_ENx pins are discharged and remain discharged during TSD to ensure proper power sequencing when the system recovers. LOOP COMPENSATION All three BUCKs are voltage mode converters designed to be stable with ceramic capacitors. Refer to Component Selection Procedure section for calculating feedback components. 3.3-V REGULATOR The TPS65232 has a built-in 3.3-V regulator for powering internal circuitry. The 3.3-V rail can also be used for enabling the BUCK regulators and/or the USB switches, but is not intended for supplying any other external circuitry. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TPS65232 Not Recommended for New Designs |
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