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SN74LV14ATPWREP Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LV14ATPWREP Datasheet(HTML) 1 Page - Texas Instruments |
1 / 15 page www.ti.com FEATURES 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1Y 2A 2Y 3A 3Y GND VCC 6A 6Y 5A 5Y 4A 4Y D OR PW PACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION SN74LV14A-EP HEX SCHMITT-TRIGGER INVERTER SCLS499C – MAY 2003 – REVISED JUNE 2006 • Controlled Baseline • ESD Protection Exceeds JESD 22 – One Assembly/Test Site, One Fabrication – 2000-V Human-Body Model (A114-A) Site – 200-V Machine Model (A115-A) • Extended Temperature Performance of –55 °C – 1000-V Charged-Device Model (C101) to 125 °C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) • Typical V OLP (Output Ground Bounce) <0.8 V at V CC = 3.3 V, TA = 25°C • Typical V OHV (Output VOH Undershoot) >2.3 V at V CC = 3.3 V, TA = 25°C • Supports Mixed-Mode Voltage Operation on All Ports • I off Supports Partial-Power-Down Mode Operation (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. This hex Schmitt-trigger inverter is designed for 2-V to 5.5-V VCC operation. The SN74LV14A contains six independent inverters. This device performs the Boolean function Y = A. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING –40 °C to 105°C TSSOP – PW Tape and reel SN74LV14ATPWREP LV14AEP SOIC – D Tape and reel SN74LV14AMDREP LV14AEP –55 °C to 125°C TSSOP – PW Tape and reel SN74LV14AMPWREP LV14AEP (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each inverter) INPUT OUTPUT A Y H L L H Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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