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REG103FA-3.3 Datasheet(PDF) 2 Page - Texas Instruments |
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REG103FA-3.3 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 26 page REG103 2 SBVS010D ABSOLUTE MAXIMUM RATINGS(1) Supply Input Voltage, VIN ....................................................... –0.3V to 16V Enable Input Voltage, VEN ....................................................... –0.3V to VIN Feedback Voltage, VFB ........................................................ –0.3V to 6.0V NR Pin Voltage, VNR ............................................................. –0.3V to 6.0V Error Flag Output ..................................................................... –0.3V to 6V Error Flag Current ............................................................................... 2mA Output Short-Circuit Duration ...................................................... Indefinite Operating Temperature Range ....................................... –55 °C to +125°C Storage Temperature Range .......................................... –65 °C to +150°C Junction Temperature ..................................................... –55 °C to +150°C Lead Temperature (soldering, 3s, SO-8, SOT, and DDPAK) ........ +240 °C ESD Rating: HBM (VOUT to GND) ..................................................... 1.5kV HBM (All other pins) ........................................................ 2kV CDM .............................................................................. 500V NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper han- dling and installation procedures can cause damage. ESD damage can range from subtle performance degrada- tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PIN CONFIGURATIONS Top View V OUT V OUT NR/Adjust(1) GND V IN V IN ERROR ENABLE SO-8 1 2 3 4 8 7 6 5 NOTE: (1) For REG103A-A: voltage setting resistor pin. All other models: noise reduction capacitor pin. GND ENABLE V IN NR/Adjust(1) V O 123 4 5 DDPAK-5 SOT223-5 (U Package) (F Package) (G Package) Tab is GND Tab is GND ENABLE NR/Adjust(1) GND V IN 12 3 4 5 V OUT PACKAGE/ORDERING INFORMATION(1) PRODUCT VOUT REG103xx- yyyy/zzz XX is package designator. YYYY is typical output voltage (5 = 5.0V, 2.85 = 2.85V, A = Adjustable). ZZZ is package quantity. (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. |
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