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REG102GA-2.5G4 Datasheet(PDF) 9 Page - Texas Instruments |
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REG102GA-2.5G4 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 25 page  REG102 9 SBVS024F www.ti.com FIGURE 1. Fixed Voltage Nominal Circuit for the REG102. REG102 Enable V OUT C OUT V IN 0.1 µF C NR 0.01 µF GND NR In Out Optional FIGURE 2. Adjustable Voltage Circuit for the REG102A. FIGURE 3. Foldback Current Limit of the REG102-3.3 at 25 °C. VOUT = (1 + R1/R2) • 1.26V Pin numbers for the SOT-223 package. REG102 V IN 0.1 µF 3 1 Gnd V OUT R 1 C FB 0.01 µF C OUT Adj R 2 I ADJ Load 2 4 5 Enable To reduce current through divider, increase resistor values (see table at right). As the impedance of the resistor divider increases, IADJ (~200nA) may introduce an error. CFB improves noise and transient response. V OUT (V) R 1 (Ω) (1) R 2 (Ω) (1) 2.5 11.3k 11.5k 1.13k 1.15k 3.0 15.8k 11.5k 1.58k 1.15k 3.3 18.7k 11.5k 1.87k 1.15k 5.0 34.0k 11.5k 3.40k 1.15k NOTE: (1) Resistors are standard 1% values. EXAMPLE RESISTOR VALUES Optional 0 50 100 150 200 250 300 350 I SC I CL 400 450 3.5 3 2.5 2 1.5 1 0.5 0 Output Current (mA) CURRENT LIMIT FOLDBACK REG102-3.3 BASIC OPERATION The REG102 series of LDO (low dropout) linear regulators offers a wide selection of fixed output voltage versions and an adjustable output version as well. The REG102 belongs to a family of new generation LDO regulators that use a DMOS pass transistor to achieve ultra low-dropout perfor- mance and freedom from output capacitor constraints. Ground pin current remains under 1mA over all line, load, and temperature conditions. All versions have thermal and over- current protection, including foldback current limit. The REG102 does not require an output capacitor for regulator stability and is stable over most output currents and with almost any value and type of output capacitor up to 10 µF or more. For applications where the regulator output current drops below several milliamps, stability can be enhanced by adding a 1k Ω to 2k Ω load resistor, using capacitance values smaller than 10 µF, or keeping the effective series resistance greater than 0.05 Ω including the capacitor ESR and parasitic resistance in printed circuit board traces, solder joints, and sockets. Although an input capacitor is not required, it is a good standard analog design practice to connect a 0.1 µF low ESR capacitor across the input supply voltage. This is recom- mended to counteract reactive input sources and improve ripple rejection by reducing input voltage ripple. Figure 1 shows the basic circuit connections for the fixed voltage models. Figure 2 gives the connections for the adjust- able output version (REG102A) and example resistor values for some commonly used output voltages. Values for other volt- ages can be calculated from the equation shown in Figure 2. INTERNAL CURRENT LIMIT The REG102 internal current limit has a typical value of 400mA. A foldback feature limits the short-circuit current to a typical short-circuit value of 150mA, which helps to protect the regulator from damage under all load conditions. A characteristic of VOUT versus IOUT is given in Figure 3 and in the Typical Characteristics section. |
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