REGISTER MAPPING

ONET8501PB

The register mapping for read/write register addresses 0 (0x00) through 11 (0x0B) are shown in Table 5 through

Table 16. The register mapping for the read only register addresses 14 (0x0E) and 15 (0x0F) are shown in

Table 17 and Table 18.

Table 19 describes the circuit functionality based on the register settings.

Table 5. Register 0 (0x00) Mapping – Control Settings

register address 0 (0x00)

bit 7

bit 6

bit 5

bit4

bit 3

bit 2

bit 1

bit 0

–

–

–

–

DIS

LOSRNG

OCDIS

I2CDIS

Table 6. Register 1 (0x01) Mapping – Input Threshold Adjust

register address 1 (0x01)

bit 7

bit 6

bit 5

bit4

bit 3

bit 2

bit 1

bit 0

THADJ7

THADJ6

THADJ5

THADJ4

THADJ3

THADJ2

THADJ1

THADJ0

Table 7. Register 2 (0x02) Mapping – Pre-emphasis Adjust

register address 2 (0x02)

bit 7

bit 6

bit 5

bit4

bit 3

bit 2

bit 1

bit 0

–

–

–

–

PEADJ3

PEADJ2

PEADJ1

PEADJ0

Table 8. Register 3 (0x03) Mapping – Output Amplitude Adjust

register address 3 (0x03)

bit 7

bit 6

bit 5

bit4

bit 3

bit 2

bit 1

bit 0

–

–

–

–

–

–

AMP1

AMP0

Table 9. Register 4 (0x04) Mapping – Rate Selection Register A

register address 4 (0x04)

bit 7

bit 6

bit 5

bit4

bit 3

bit 2

bit 1

bit 0

RSASEL

–

–

–

RSA3

RSA2

RSA1

RSA0

Table 10. Register 5 (0x05) Mapping – Rate Selection Register B

register address 5 (0x05)

bit 7

bit 6

bit 5

bit4

bit 3

bit 2

bit 1

bit 0

RSBSEL

–

–

–

RSB3

RSB2

RSB1

RSB0

Table 11. Register 6 (0x06) Mapping – Rate Selection Register C

register address 6 (0x06)

bit 7

bit 6

bit 5

bit4

bit 3

bit 2

bit 1

bit 0

RSCSEL

–

–

–

RSC3

RSC2

RSC1

RSC0

Table 12. Register 7 (0x07) Mapping – Rate Selection Register D

register address 7 (0x07)

bit 7

bit 6

bit 5

bit4

bit 3

bit 2

bit 1

bit 0

RSDSEL

–

–

–

RSD3

RSD2

RSD1

RSD0

10

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