 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PGA450TPWRQ1 Datasheet(PDF) 6 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
PGA450TPWRQ1 Datasheet(HTML) 6 Page - Texas Instruments |
|
|
6 / 58 page  PGA450-Q1 SLDS185A – APRIL 2012 – REVISED APRIL 2012 www.ti.com ELECTRICAL CHARACTERISTICS PARAMETER CONDITIONS MIN TYP MAX UNIT POWER SUPPLY VPWR voltage for POR to VPWRPOR POR is deasserted 3 4.2 V occur VAVDD AVDD pin voltage IAVDD = 5 mA 4.75 5 5.25 V IAVDD AVDD pin load current 5 mA VDVDD DVDD pin voltage 1.8 V VREF VREF pin voltage 3 V Power-up time – AVDD and VPWR = 7 V to 18 V, VREG is not in tPU 10 ms DVDD reach regulation levels. regulation VREG VPWR = 7V VREG_SEL = 0_XXX for 4.7 ±100 V–5.4 V Transducer primary voltage IREG = VREGTOL mV tolerance 100 µA VPWR = 10V VREG_SEL = 1_XXX for 7.7 ±150 V–8.4 V Transducer voltage droop while VREGCHARGE IREG = 100 mA, below VREG_SEL setting 500 charging mV VREGREADY VREG_READY threshold Below VREG_SEL setting 250 VPWR > VREG_SEL + 2.5 V 90 100 110 mA IVREG VREG output current VPWR > VREG_SEL + 2 V 100 µA VREG short-to-ground VREGI_S2G VPWR = 16 V, TA = 105 °C, no burst 110 mA protection current CLOCK FOSC Internal oscillator frequency 25°C 15.8 16 16.2 MHz FDUTY Internal oscillator duty cycle 50 % Before LIN sync –4 4 % Internal oscillator frequency accuracy LIN baud rate = 19.2 kBPS, after LIN sync –0.5 0.5 % LOW-SIDE DRIVE MOSFETs rds(on) FET ON resistance Iload = 500 mA, TA = 105 °C 1.2 Ω IPULSE Drain pulse current 50 kHz 1.5 A Drive clamping voltage Vgs = 0 V, Idd = 10 mA 40 V Leakage current 5 µA LOW NOISE AMPLIFIER LNA_GAIN setting = 0b00 1680 1750 1820 LNA_GAIN setting = 0b01 892 930 968 AV Gain V/V LNA_GAIN Setting = 0b10 496 517 538 LNA_GAIN Setting = 0b11 99 104 109 RIN Input impedance 40 kHz 100 k Ω Clamp voltage –1.5 1.5 V ILIM Input current limit 200 mA Noise (input-referred of the IN pin = GND, TA = 105 °C, center 0.7 µVrms signal chain) frequency = 40 kHz, Bandwidth = 10 kHz Input-referred PSRR VPWR = 7 V, LNA gain setting = 0b00 93 dB 12-bit A/D CONVERTER VADCREF Input voltage range 0 3 V Conversion time 1 µs DNL 20% to 80% input range 2.5 LSB INL 20% to 80% input range, best-fit curve 4 LSB Gain Best-fit curve 1373 1378 1383 LSB/V 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): PGA450-Q1 |
Similar Part No. - PGA450TPWRQ1 |
|
Similar Description - PGA450TPWRQ1 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
