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FR011L5J Datasheet(PDF) 10 Page - Fairchild Semiconductor |
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FR011L5J Datasheet(HTML) 10 Page - Fairchild Semiconductor |
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10 / 12 page  © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FR011L5J • Rev. C2 10 Typical Application Waveforms (Continued) Typical USB3.0 conditions. Figure 19. Startup Waveform without FR011L5J, DC Power Source=5V, C1=100µF, C2=10uF, R1=R2=10kΩ, R3=27Ω Application Information Figure 17 shows the voltage and current waveforms when a virtual USB3.0 device is connected to a 5V source. A USB application allows a maximum source output capacitance of C1 = 120µF and a maximum device-side input capacitance of C2 = 10µF plus a maximum load (minimum resistance) of R3 = 27Ω. C1 = 100µF, C2 = 10µF and R3 = 27Ω were used for testing. When the DC power source is connected to the circuit (refer to Figure 13) , the built-in startup diode initially conducts the current such that the USB device powers up. Due to the initial diode voltage drop, the FR011L5J effectively reduces the peak inrush current of a hot plug event. Under these test conditions, the input inrush current reaches about 6.3A peak. While the current flows, the input voltage increases. The speed of this input voltage increase depends on the time constant formed by the load resistance R3 and load capacitance C2. The larger the time constant, the slower the input voltage increase. As the input voltage approaches a level equal to the protector’s turn-on voltage, VON, the protector turns on and operates in Low-Resistance Mode as defined by VIN and operating current IIN. In the event of a negative transient, or when the DC power source is reversely connected to the circuit, the device blocks the flow of current and holds off the voltage, thereby protecting the USB device. Figure 18 shows the voltage and current waveforms when a virtual USB3.0 device is reversely biased; the output voltage is near 0 and response time is less than 50ns. Figure 19 shows the voltage and current waveforms when no reverse bias protection is implemented. In Figure 17, while the reverse bias protector is present, the input voltage, VIN, and the output voltage, VO, are separated and look different. When this reverse bias protector is removed, VIN and VO merge, as shown inFigure 19 as VIN. This VIN is also the voltage applied to the load circuit. It can be seen that, with reverse bias protection, the voltage applied to the load and the current flowing into the load look very much the same as without reverse bias protection. Benefits of Reverse Bias Protection The most important benefit is to prevent accidently reverse-biased voltage from damaging the USB load. Another benefit is that the peak startup inrush current can be reduced. How fast the input voltage rises, the input/output capacitance, the input voltage, and how heavy the load is determine how much the inrush current can be reduced. In a 5V USB application, for example, the inrush current can be 5% - 20% less with different input voltage rising rate and other factors. This can offer a system designer the option of increasing C2 while keeping “effective” USB device capacitance down. ─ V IN, 2V/div. The voltage applied on the load circuit ─ i IN, 2A/div. The input current Time: 5us/div |
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