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TIBPLS506ACNT Datasheet(PDF) 1 Page - Texas Instruments |
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TIBPLS506ACNT Datasheet(HTML) 1 Page - Texas Instruments |
1 / 16 page TIBPLS506AC 13 × 97 × 8 FIELD-PROGRAMMABLE LOGIC SEQUENCER SRPS003C – D3090, DECEMBER 1987 – REVISED NOVEMBER 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Copyright © 1995, Texas Instruments Incorporated 1 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • 58-MHz Max Clock Rate • Two Transition Complement Array Terms • 16-Bit Internal State Registers • 8-Bit Output Registers • Outputs Programmable for Registered or Combinational Operation • Ideal for Waveform Generation and High-Performance State Machine Applications • Programmable Output Enable • Programmable Clock Polarity description The TIBPLS506AC is a TTL field-programmable state machine of the Mealy type. This state machine (logic sequencer) contains 97 product terms (AND terms) and 48 sum terms (OR terms). The product and sum terms are used to control the 16-bit internal state registers and the 8-bit output registers. The outputs of the internal state registers (P0 – P15) are fed back and combined with the 13 inputs (I0 – I12) to form the AND array. In addition, two sum terms are complemented and fed back to the AND array, which allows any product term to be summed, complemented, and used as input to the AND array. The eight output cells can be individually programmed for registered or combinational operation. Nonregistered operation is selected by blowing the output multiplexer fuse. Registered output operation is selected by leaving the output multiplexer fuse intact. Pin 17 can be programmed to function as an input and/or an output enable. Blowing the output enable fuse lets pin 17 function as an output enable but does not disconnect pin 17 from the input array. When the output enable fuse is intact, pin 17 functions only as an input with the outputs being permanently enabled. The state and output registers are synchronously clocked by the fuse programmable clock input. The clock polarity fuse selects either postive- or negative-edge triggering. Negative-edge triggering is selected by blowing the clock polarity fuse. Leaving this fuse intact selects positive-edge triggering. After power-up, the device must be initialized to the desired state. When the output multiplexer fuse is left intact, registered operation is selected. The TIBPLS506AC is characterized for operation from 0 °C to 75°C. 32 1 28 27 12 13 5 6 7 8 9 10 11 25 24 23 22 21 20 19 I8 I9 I10 NC I11 I12/OE Q7 I2 I3 I4 NC I5 Q0 Q1 426 14 15 16 17 18 FK OR FN PACKAGE (TOP VIEW) NC – No internal connection 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 CLK I0 I1 I2 I3 I4 I5 Q0 Q1 Q2 Q3 GND VCC I6 I7 I8 I9 I10 I11 I12/OE Q7 Q6 Q5 Q4 JT OR NT PACKAGE (TOP VIEW) |
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