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MCM28F256ACH Datasheet(PDF) 3 Page - Texas Instruments |
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MCM28F256ACH Datasheet(HTML) 3 Page - Texas Instruments |
3 / 14 page Block Diagram TLZ12436 – 2 Functional Description The MCM28F256ACH is a 268435456-bit (256-Mbit) flash memory module organized as 16 pages with 16777216 bytes (8388608 words) per page The module is segment- ed into 512 independently lockable blocks (32 blocks per page) A Command User Interface (CUI) serves as the interface between the system controller and each page of internal memory Automation of the byteword write and block erase functions allow these commands to be executed using a two-write command sequence to the CUI An internal Write State Machine (WSM) automatically executes the algo- rithms timings and verifications necessary for the write and erase operations thereby relieving the system controller of these tasks Each page of memory has three types of status registers and a RYBY output to provide information on the progress of the requested operation The Compatible Status Register (CSR) is 100% compatible with status register used in previ- ous FlashFile memory devices The Global Status Register (GSR) informs the system of command queue status sector buffer status and WSM status Block Status Registers (BSR) provide block-specific status information such as the block lock bit status A choice of four different RYBY configura- tions can be selected via special CUI commands level- mode (default) pulse-on-write pulse-on-erase or disabled 2 |
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